On Wednesday 20 February 2008, Mike Nuss wrote:
On PPC440EPx without a bootstrap I2C EEPROM, the PLL can be reconfigured after startup to change the speed of the clocks. This patch adds the option CFG_PLL_RECONFIG. If this option is set to 667, the CPU initialization code will reconfigure the PLL to run the system with a CPU frequency of 667MHz and PLB frequency of 166MHz, without the need for an external EEPROM.
Signed-off-by: Mike Nuss mike@terascala.com Cc: Stefan Roese sr@denx.de
Applied to u-boot-ppc4xx locally. Thanks.
Best regards, Stefan
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