
Murray Jensen wrote:
On Sat, 04 Jan 2003 00:22:21 +0800, YanMin Qiao sepherosa@sohu.com writes: ...
cmplw cr1,r3,r4
...
bge cr1,2f
...
1: lwzu r0,4(r8) stwu r0,4(r7) bdnz 1b b 4f
2: slwi r0,r0,2 <<----------------- i think above code will be enough for the two add r8,r4,r0 situation add r7,r3,r0 3: lwzu r0,-4(r8) stwu r0,-4(r7) bdnz 3b
One is copying forwards, the other is copying backwards - you can see the lwzu/stwu pair of instructions either add +4 or -4 to the registers containing the source and destination addresses (the "u" means to update the index register with the resulting memory address).
First thanks for your answer, howerever, my question is Why we copy _forward_ when _memory address_ <CFG_MONITOR_BASE, but when _memory address_>=CFG_MONITOR_BASE we will have to _copy backword_? Is it because some overlapping problem when copy?
Be careful with the first "bge" above - it isn't testing the result of the previous instruction, it is testing the result of the "cmplw" done quite a few instructions beforehand and stored in "cr1" i.e. it will branch if "r3" (the destination address) is >= "r4" (the source address) i.e. if it is possible that the copy will overwrite the source.
thanks, I know
The Powerpc CPU has four(?) condition code sets where results of operations can be stored. While I don't understand the details, I presume it has something to do with the instruction pipeline and avoiding unnecessary flushes - esp. when you consider that the programmer can indicate whether a branch is likely or not with a bit in the instruction - I presume (again) that this determines whether the processor does pre-fetching or something like that. Details of all this stuff is in the Powerpc Programmer's Environment Manual (I think).
If you look through the latest linux kernel source you often see things like
if (unlikely(<condition>)) {
or
if (likely(<condition>)) {
On powerpc (I'm guessing) these macros will set an attribute for the compiler which will result in this bit being set or cleared in the branch instruction of the resulting assembly code - I guess it does something similar for later Pentium processors (and nothing at all if the processor doesn't have these sort of features). Cheers! Murray... -- Murray Jensen, CSIRO Manufacturing & Infra. Tech. Phone: +61 3 9662 7763 Locked Bag No. 9, Preston, Vic, 3072, Australia. Fax: +61 3 9662 7853 Internet: Murray.Jensen@csiro.au
Hymod project: http://www.msa.cmst.csiro.au/projects/Hymod/
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