On 3/9/24 03:11, Marek Vasut wrote:
Use const bool for the values parsed out of DT. Drop the duplicate assignment of false into those bool variables, assign them directly with the content parsed out of DT. Abbreviate the variable name too.
Signed-off-by: Marek Vasutmarex@denx.de
Cc: Christophe Roullierchristophe.roullier@st.com Cc: Joe Hershbergerjoe.hershberger@ni.com Cc: Patrice Chotardpatrice.chotard@foss.st.com Cc: Patrick Delaunaypatrick.delaunay@foss.st.com Cc: Ramon Friedrfried.dev@gmail.com Cc:u-boot@dh-electronics.com Cc:uboot-stm32@st-md-mailman.stormreply.com
drivers/net/dwc_eth_qos_stm32.c | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-)
diff --git a/drivers/net/dwc_eth_qos_stm32.c b/drivers/net/dwc_eth_qos_stm32.c index 72f65f80540..33477925ff1 100644 --- a/drivers/net/dwc_eth_qos_stm32.c +++ b/drivers/net/dwc_eth_qos_stm32.c @@ -128,17 +128,13 @@ static int eqos_stop_clks_stm32(struct udevice *dev) static int eqos_probe_syscfg_stm32(struct udevice *dev, phy_interface_t interface_type) {
bool eth_ref_clk_sel_reg = false;bool eth_clk_sel_reg = false;
/* Ethernet 50MHz RMII clock selection */const bool eth_ref_clk_sel = dev_read_bool(dev, "st,eth-ref-clk-sel");/* Gigabit Ethernet 125MHz clock selection. */const bool eth_clk_sel = dev_read_bool(dev, "st,eth-clk-sel"); u8 *syscfg; u32 value;
/* Gigabit Ethernet 125MHz clock selection. */eth_clk_sel_reg = dev_read_bool(dev, "st,eth-clk-sel");/* Ethernet 50Mhz RMII clock selection */eth_ref_clk_sel_reg = dev_read_bool(dev, "st,eth-ref-clk-sel");syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG); if (!syscfg) return -ENODEV;@@ -154,14 +150,14 @@ static int eqos_probe_syscfg_stm32(struct udevice *dev, dev_dbg(dev, "PHY_INTERFACE_MODE_GMII\n"); value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK, SYSCFG_PMCSETR_ETH_SEL_GMII_MII);
if (eth_clk_sel_reg)
if (eth_clk_sel) value |= SYSCFG_PMCSETR_ETH_CLK_SEL; break; case PHY_INTERFACE_MODE_RMII: dev_dbg(dev, "PHY_INTERFACE_MODE_RMII\n"); value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK, SYSCFG_PMCSETR_ETH_SEL_RMII);
if (eth_ref_clk_sel_reg)
if (eth_ref_clk_sel) value |= SYSCFG_PMCSETR_ETH_REF_CLK_SEL; break; case PHY_INTERFACE_MODE_RGMII:@@ -171,7 +167,7 @@ static int eqos_probe_syscfg_stm32(struct udevice *dev, dev_dbg(dev, "PHY_INTERFACE_MODE_RGMII\n"); value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK, SYSCFG_PMCSETR_ETH_SEL_RGMII);
if (eth_clk_sel_reg)
if (eth_clk_sel) value |= SYSCFG_PMCSETR_ETH_CLK_SEL; break; default:
Reviewed-by: Christophe ROULLIERchristophe.roullier@foss.st.com