
-----Original Message----- From: Valentin Longchamp [mailto:valentin.longchamp@keymile.com] Sent: Wednesday, May 04, 2011 9:24 PM To: u-boot@lists.denx.de Cc: holger.brunck@keymile.com; Prafulla Wadaskar; Valentin Longchamp; Wolfgang Denk; Detlev Zundel Subject: [PATCH v3 8/8] arm/km: update mgcoge3un board support
From: Holger Brunck holger.brunck@keymile.com
This line should be removed or moved to cc/ack/test list, it will appear in commit log
We change default settings for egiga on mgcoge3un. The reason we need this is that we have the gig port on mgcoge3un connected using a back-to-back pair of PHYs. There are no magnetics and because of that the port has to be run with a fixd configuration and auto-negotiation must be disabled. In the default mode the egiga driver uses autoneg to determine port speed - which defaults to 1G (we need 100M full duplex).
Add wait for the GPIO line connected to mgcoge3ne before starting mgcoge3un. A board specific ethernet present function was added, because on this board ethernet is always present. The BOCO FPGA access was enhanced and changed to use register definitions.
Signed-off-by: Holger Brunck holger.brunck@keymile.com Signed-off-by: Valentin Longchamp valentin.longchamp@keymile.com Acked-by: Heiko Schocher hs@denx.de cc: Wolfgang Denk wd@denx.de cc: Detlev Zundel dzu@denx.de cc: Prafulla Wadaskar prafulla@marvell.com
Changes for v2:
- split up first large patch series to three independent smaller patch series
Changes for v3:
- taken Prafulla's comments into account, merged with previous 08/08
patch
board/keymile/km_arm/km_arm.c | 80 +++++++++++++++++++++++++++++++++-
include/configs/mgcoge3un.h | 25 +++++++++++++ 2 files changed, 91 insertions(+), 14 deletions(-)
diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c index 4049a4e..d86acc9 100644 --- a/board/keymile/km_arm/km_arm.c +++ b/board/keymile/km_arm/km_arm.c @@ -41,6 +41,16 @@
DECLARE_GLOBAL_DATA_PTR;
+/*
- BOCO FPGA definitions
- */
+#define BOCO 0x10 +#define REG_CTRL_H 0x02 +#define MASK_WRL_UNITRUN 0x01 +#define MASK_RBX_PGY_PRESENT 0x40 +#define REG_IRQ_CIRQ2 0x2d +#define MASK_RBI_DEFECT_16 0x01
/* Multi-Purpose Pins Functionality configuration */ u32 kwmpp_config[] = { MPP0_NF_IO2, @@ -102,43 +112,64 @@ u32 kwmpp_config[] = { 0 };
+#if defined(CONFIG_MGCOGE3UN) +/*
- Wait for startup OK from mgcoge3ne
- */
+int startup_allowed(void) +{
- unsigned char buf;
- /*
* Read CIRQ16 bit (bit 0)
*/
- if (i2c_read(BOCO, REG_IRQ_CIRQ2, 1, &buf, 1) != 0)
printf("%s: Error reading Boco\n", __func__);
- else
if ((buf & MASK_RBI_DEFECT_16) == MASK_RBI_DEFECT_16)
return 1;
- return 0;
+}
+/*
- mgcoge3un has always ethernet present. Its connected to the 6061
switch
- and provides ICNev and piggy4 connections.
- */
+int ethernet_present(void) +{
- return 1;
+} +#else int ethernet_present(void) { uchar buf; int ret = 0;
- if (i2c_read(0x10, 2, 1, &buf, 1) != 0) {
- if (i2c_read(BOCO, REG_CTRL_H, 1, &buf, 1) != 0) { printf("%s: Error reading Boco\n", __func__); return -1; }
- if ((buf & 0x40) == 0x40)
- if ((buf & MASK_RBX_PGY_PRESENT) == MASK_RBX_PGY_PRESENT)
You can #if here instead of as done above, it will help to reduce code size and will be more readable. I am sorry if I missed this in the earlier post.
ret = 1;
return ret; } +#endif
int initialize_unit_leds(void) { /*
* init the unit LEDs
* per default they all are
* Init the unit LEDs per default they all are
- ok apart from bootstat
* LED connected through BOCO
* BOCO lies at the address 0x10
* LEDs are in the block CTRL_H (addr 0x02)
* BOOTSTAT LED is the first 0x01
*/
#define BOCO 0x10
#define CTRL_H 0x02
#define APPLEDMASK 0x01 uchar buf;
if (i2c_read(BOCO, CTRL_H, 1, &buf, 1) != 0) {
- if (i2c_read(BOCO, REG_CTRL_H, 1, &buf, 1) != 0) { printf("%s: Error reading Boco\n", __func__); return -1; }
- buf |= APPLEDMASK;
- if (i2c_write(BOCO, CTRL_H, 1, &buf, 1) != 0) {
- buf |= MASK_WRL_UNITRUN;
- if (i2c_write(BOCO, REG_CTRL_H, 1, &buf, 1) != 0) { printf("%s: Error writing Boco\n", __func__); return -1; }
@@ -167,6 +198,27 @@ int misc_init_r(void) printf("Overwriting MACH_TYPE with %d!!!\n", mach_type); gd->bd->bi_arch_number = mach_type; } +#if defined(CONFIG_MGCOGE3UN)
- char *wait_for_ne;
- wait_for_ne = getenv("waitforne");
- if (wait_for_ne != NULL) {
if (strcmp(wait_for_ne, "true") == 0) {
int cnt = 0;
puts("NE go: ");
while (startup_allowed() == 0) {
udelay(200000);
cnt++;
if (cnt == 5)
puts("wait\b\b\b\b");
if (cnt == 10) {
cnt = 0;
puts(" \b\b\b\b");
}
}
puts("OK\n");
}
- }
+#endif
initialize_unit_leds(); set_km_env(); diff --git a/include/configs/mgcoge3un.h b/include/configs/mgcoge3un.h index 1c32085..d022c4f 100644 --- a/include/configs/mgcoge3un.h +++ b/include/configs/mgcoge3un.h @@ -50,4 +50,29 @@ /* we use a new RAM type on mgcoge3un board */ #define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage- memphis.cfg
+/*
- mgcoge3un has a fixed link to the marvell switch
- with 100MB full duplex and autoneg off, for this
- reason we have to change the default settings
- */
+#define PORT_SERIAL_CONTROL_VALUE ( \
- MVGBE_FORCE_LINK_PASS | \
- MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \
- MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \
- MVGBE_ADV_NO_FLOW_CTRL | \
- MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
- MVGBE_FORCE_BP_MODE_NO_JAM | \
- (1 << 9) /* Reserved bit has to be 1 */ | \
- MVGBE_DO_NOT_FORCE_LINK_FAIL | \
- MVGBE_DIS_AUTO_NEG_SPEED_GMII | \
- MVGBE_DTE_ADV_0 | \
- MVGBE_MIIPHY_MAC_MODE | \
- MVGBE_AUTO_NEG_NO_CHANGE | \
- MVGBE_MAX_RX_PACKET_1552BYTE | \
- MVGBE_CLR_EXT_LOOPBACK | \
- MVGBE_SET_FULL_DUPLEX_MODE | \
- MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\
- MVGBE_SET_GMII_SPEED_TO_10_100 |\
- MVGBE_SET_MII_SPEED_TO_100)
#endif /* _CONFIG_MGCOGE3UN_H */
1.7.0.5
Regards.. Prafulla . .