The VSC8584 and VSC8574 PHYs are 4-port PHYs that are 10/100/1000BASE-T, 100BASE-FX, 1000BASE-X and triple-speed copper SFP capable, can communicate with the MAC via SGMII, QSGMII or 1000BASE-X, supports WOL, downshifting and can set the blinking pattern of each of its 4 LEDs, supports SyncE as well as HP Auto-MDIX detection.
This adds support for 10/100/1000BASE-T and SGMII/QSGMII link with the MAC.
They have also an internal Intel 8051 microcontroller whose firmware needs to be patched when the PHY is reset. If the 8051's firmware has the expected CRC, its patching can be skipped. The microcontroller can be accessed from any port of the PHY, though the CRC function can only be done through the PHY that is the base PHY of the package (internal address 0) due to a limitation of the firmware.
The GPIO register bank is a set of registers that are common to all PHYs in the package. So any modification in any register of this bank affects all PHYs of the package.
Thanks, Quentin
v2: - used BIT and GENMASK instead of hex values, - defined a few magic values, - fixed comments formatting, - added comments on register writes for analog and electrical tweaks, - fixed a redondant use of (0x8000 | 0x8000 | addr) in vsc8584_csr_write for vsc8574,
Quentin Schulz (3): net: phy: mscc: add support for VSC8584 PHY net: phy: mscc: factorize part of config function for VSC8584 net: phy: mscc: add support for VSC8574 PHY
drivers/net/phy/mscc.c | 994 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 994 insertions(+)