
On 2/26/21 3:15 PM, Rayagonda Kokatanur wrote:
From: Bharat Gooty bharat.gooty@broadcom.com
Add tuning functionality which is needed for HS200 mode. For HS200, program the correct needed 1.8 voltage
Signed-off-by: Bharat Gooty bharat.gooty@broadcom.com Signed-off-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com
Reviewed-by: Jaehoon Chung jh80.chung@samsung.com
Best Regards, Jaehoon Chung
Changes from v1: --Address review comments from Jaehoon Chung, Add comment for udelay Move #define to top Remove udelay
drivers/mmc/iproc_sdhci.c | 92 +++++++++++++++++++++++++++++++++++---- 1 file changed, 83 insertions(+), 9 deletions(-)
diff --git a/drivers/mmc/iproc_sdhci.c b/drivers/mmc/iproc_sdhci.c index 6e4f527e5d..11d86ad658 100644 --- a/drivers/mmc/iproc_sdhci.c +++ b/drivers/mmc/iproc_sdhci.c @@ -10,8 +10,11 @@ #include <malloc.h> #include <sdhci.h> #include <asm/global_data.h> +#include "mmc_private.h" #include <linux/delay.h>
+#define MAX_TUNING_LOOP 40
DECLARE_GLOBAL_DATA_PTR;
struct sdhci_iproc_host { @@ -140,17 +143,89 @@ static void sdhci_iproc_writeb(struct sdhci_host *host, u8 val, int reg)
static int sdhci_iproc_set_ios_post(struct sdhci_host *host) {
- u32 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
- struct mmc *mmc = (struct mmc *)host->mmc;
- u32 ctrl;
- if (mmc->signal_voltage == MMC_SIGNAL_VOLTAGE_180) {
ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
ctrl |= SDHCI_CTRL_VDD_180;
sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2);
- }
- /* Reset UHS mode bits */
- ctrl &= ~SDHCI_CTRL_UHS_MASK;
- sdhci_set_uhs_timing(host);
- return 0;
+}
- if (host->mmc->ddr_mode)
ctrl |= UHS_DDR50_BUS_SPEED;
+static void sdhci_start_tuning(struct sdhci_host *host) +{
u32 ctrl;
ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
ctrl |= SDHCI_CTRL_EXEC_TUNING; sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2);
- return 0;
- sdhci_writel(host, SDHCI_INT_DATA_AVAIL, SDHCI_INT_ENABLE);
- sdhci_writel(host, SDHCI_INT_DATA_AVAIL, SDHCI_SIGNAL_ENABLE);
+}
+static void sdhci_end_tuning(struct sdhci_host *host) +{
- /* Enable only interrupts served by the SD controller */
- sdhci_writel(host, SDHCI_INT_DATA_MASK | SDHCI_INT_CMD_MASK,
SDHCI_INT_ENABLE);
- /* Mask all sdhci interrupt sources */
- sdhci_writel(host, 0x0, SDHCI_SIGNAL_ENABLE);
+}
+static int sdhci_iproc_execute_tuning(struct mmc *mmc, u8 opcode) +{
- struct mmc_cmd cmd;
- u32 ctrl;
- u32 blocksize = SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG, 64);
- struct sdhci_host *host = dev_get_priv(mmc->dev);
- char tuning_loop_counter = MAX_TUNING_LOOP;
- int ret = 0;
- sdhci_start_tuning(host);
- cmd.cmdidx = opcode;
- cmd.resp_type = MMC_RSP_R1;
- cmd.cmdarg = 0;
- if (opcode == MMC_CMD_SEND_TUNING_BLOCK_HS200 && mmc->bus_width == 8)
blocksize = SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG, 128);
- sdhci_writew(host, blocksize, SDHCI_BLOCK_SIZE);
- sdhci_writew(host, 1, SDHCI_BLOCK_COUNT);
- sdhci_writew(host, SDHCI_TRNS_READ, SDHCI_TRANSFER_MODE);
- do {
mmc_send_cmd(mmc, &cmd, NULL);
if (opcode == MMC_CMD_SEND_TUNING_BLOCK)
/*
* For tuning command, do not do busy loop. As tuning
* is happening (CLK-DATA latching for setup/hold time
* requirements), give time to complete
*/
udelay(1);
ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
if (tuning_loop_counter-- == 0)
break;
- } while (ctrl & SDHCI_CTRL_EXEC_TUNING);
- if (tuning_loop_counter < 0 || (!(ctrl & SDHCI_CTRL_TUNED_CLK))) {
ctrl &= ~(SDHCI_CTRL_TUNED_CLK | SDHCI_CTRL_EXEC_TUNING);
sdhci_writel(host, ctrl, SDHCI_HOST_CONTROL2);
printf("%s:Tuning failed, opcode = 0x%02x\n", __func__, opcode);
ret = -EIO;
- }
- sdhci_end_tuning(host);
- return ret;
}
static struct sdhci_ops sdhci_platform_ops = { @@ -163,6 +238,7 @@ static struct sdhci_ops sdhci_platform_ops = { .write_b = sdhci_iproc_writeb, #endif .set_ios_post = sdhci_iproc_set_ios_post,
- .platform_execute_tuning = sdhci_iproc_execute_tuning,
};
struct iproc_sdhci_plat { @@ -190,9 +266,7 @@ static int iproc_sdhci_probe(struct udevice *dev)
host->name = dev->name; host->ioaddr = dev_read_addr_ptr(dev);
- host->voltages = MMC_VDD_165_195 |
MMC_VDD_32_33 | MMC_VDD_33_34;
- host->quirks = SDHCI_QUIRK_BROKEN_VOLTAGE | SDHCI_QUIRK_BROKEN_R1B;
- host->quirks = SDHCI_QUIRK_BROKEN_R1B; host->host_caps = MMC_MODE_DDR_52MHz; host->index = fdtdec_get_uint(gd->fdt_blob, node, "index", 0); host->ops = &sdhci_platform_ops;