
-----Original Message----- From: york sun Sent: Friday, March 31, 2017 6:16 AM To: Ruchika Gupta ruchika.gupta@nxp.com; u-boot@lists.denx.de Cc: Vini Pillai vinitha.pillai@nxp.com; Sumit Garg sumit.garg@nxp.com Subject: Re: [PATCH 3/3][v3] [RESEND] arm: ls1046ardb: Add SD secure boot target
On 03/29/2017 07:21 AM, Ruchika Gupta wrote:
From: Vinitha Pillai-B57223 vinitha.pillai@nxp.com
- Add SD secure boot target for ls1046ardb.
- Implement board specific spl_board_init() to setup CAAM stream ID and corresponding stream ID in SMMU.
- Change the u-boot size defined by a macro for copying the main U-Boot by
SPL
to also include the u-boot Secure Boot header size as header is appended to u-boot image. So header will also be copied from SD to DDR.
- CONFIG_MAX_SPL_SIZE is limited to 90K.SPL is copied to OCRAM (128K)
where 32K
are reserved for use by boot ROM and 6K for the header
- Reduce the size of CAAM driver for SPL. Since the size of spl image was about 94K, Blobification functions and descriptors, that are not required at the time of SPL are disabled. Further error code conversion to strings is disabled for SPL build. This reduces the spl image size to 92K.
Signed-off-by: Vinitha Pillai vinitha.pillai@nxp.com Signed-off-by: Sumit Garg sumit.garg@nxp.com Signed-off-by: Ruchika Gupta ruchika.gupta@nxp.com
Changes from v1:
- Rebased patches to latest dependent patch set
- With the dependent path set , spl imag size increased to 94K. So
- additionally reduce the spl image size by removing the functions
from
- CAAM driver that are not required in SPL flow
Dependent patch set: SECURE boot target addition for NOR on LS1043, LS1046 https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpat
chwork.ozlabs.org%2Fpatch%2F742548%2F&data=01%7C01%7Cyork.sun%40nx p.co
m%7C9ac07c8775234e16d80308d476aedabb%7C686ea1d3bc2b4c6fa92cd99c5c3 0163
5%7C0&sdata=fe9EEogXl1g%2B%2BTITuTSqQfl9RysiRwi1SStWOebmidU%3D&r eserve
d=0 https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpat
chwork.ozlabs.org%2Fpatch%2F742552%2F&data=01%7C01%7Cyork.sun%40nx p.co
m%7C9ac07c8775234e16d80308d476aedabb%7C686ea1d3bc2b4c6fa92cd99c5c3 0163
5%7C0&sdata=eujlNAJ5%2BixRVB8z0DBFVUg0xN%2BkZT63E7rbvZQud5w%3D& reserve
d=0 https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpat
chwork.ozlabs.org%2Fpatch%2F742549%2F&data=01%7C01%7Cyork.sun%40nx p.co
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5%7C0&sdata=ANaXQxRKJAEjl3fSePjTUGDEy3%2F4CmU%2F3f%2B0qc8YB4A% 3D&reser
ved=0 https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpat
chwork.ozlabs.org%2Fpatch%2F742551%2F&data=01%7C01%7Cyork.sun%40nx p.co
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https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpat
chwork.ozlabs.org%2Fpatch%2F742553%2F&data=01%7C01%7Cyork.sun%40nx p.co
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0 https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpat
chwork.ozlabs.org%2Fpatch%2F742554%2F&data=01%7C01%7Cyork.sun%40nx p.co
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5%7C0&sdata=CcKSSyrYvAJJG1fGPZI3lt6huuD995X8vCuidwmG0fc%3D&reserve d=0
and SPL size reduction patches https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpat
chwork.ozlabs.org%2Fpatch%2F744755%2F&data=01%7C01%7Cyork.sun%40nx p.co
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d=0 https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpat
chwork.ozlabs.org%2Fpatch%2F744756%2F&data=01%7C01%7Cyork.sun%40nx p.co
m%7C9ac07c8775234e16d80308d476aedabb%7C686ea1d3bc2b4c6fa92cd99c5c3 0163
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arch/arm/include/asm/fsl_secure_boot.h | 2 +- board/freescale/ls1046ardb/ls1046ardb.c | 19 +++++++++++ configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig | 45
+++++++++++++++++++++++++
drivers/crypto/fsl/jobdesc.c | 4 +-- drivers/crypto/fsl/jr.c | 19 ++++++----- include/configs/ls1046a_common.h | 17 ++++++++-- 6 files changed, 91 insertions(+), 15 deletions(-) create mode 100644 configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
This patch causes compiling error for T1042RDB_PI_NAND_SECURE_BOOT. Please check.
drivers/crypto/fsl/fsl_blob.c:28: undefined reference to `inline_cnstr_jobdesc_blob_decap'
York
We have already sent a patch upstream to fix this compilation error.
Link: https://patchwork.ozlabs.org/patch/738682/
Sumit