On 28 Jul 2017, at 05:39, Simon Glass sjg@chromium.org wrote:
Hi Philipp,
On 26 July 2017 at 04:40, Philipp Tomsich philipp.tomsich@theobroma-systems.com wrote:
This adds a DRAM controller driver for the RK3368 and places it in drivers/ddr/rockchip (where the other DM-enabled DRAM controller drivers for rockchip devices should also be moved eventually).
I thought we were actually planning on using drivers/ram ?
Thanks for catching another one of my out-of-sync commit messages. The drivers are in fact in drivers/ram (see below for the location of files) and I just hadn’t updated the message.
Love the fact that someone actually reads these with
At this stage, only the following feature-set is supported:
- DDR3
- 32-bit configuration (i.e. fully populated)
- dual-rank (i.e. no auto-detection of ranks)
- DDR3-1600K speed-bin
This driver expects to run from a TPL stage that will later return to the RK3368 BROM. It communicates with later stages through the os_reg2 in the pmugrf (i.e. using the same mechanism as Rockchip's DDR init code).
Unlike other DMC drivers for RK32xx and RK33xx parts, the required timings are calculated within the driver based on a target frequency and a DDR3 speed-bin (only the DDR3-1600K speed-bin is support at this time).
The RK3368 also has the DDRC0_CON0 (DDR ch. 0, control-register 0) register for controlling the operation of its (single-channel) DRAM controller in the GRF block. This provides for selecting DDR3, mobile DDR modes, and control low-power operation. As part of this change, DDRC0_CON0 is also added to the GRF structure definition (at offset 0x600).
Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Changes in v2: None
arch/arm/include/asm/arch-rockchip/ddr_rk3368.h | 187 ++++ arch/arm/include/asm/arch-rockchip/grf_rk3368.h | 3 + arch/arm/mach-rockchip/rk3368/Makefile | 1 - arch/arm/mach-rockchip/rk3368/sdram_rk3368.c | 60 -- .../clock/rockchip,rk3368-dmc.txt | 67 ++ drivers/ram/Makefile | 2 + drivers/ram/rockchip/Makefile | 7 + drivers/ram/rockchip/dmc-rk3368.c | 990 +++++++++++++++++++++ include/dt-bindings/memory/rk3368-dmc.h | 30 + 9 files changed, 1286 insertions(+), 61 deletions(-) create mode 100644 arch/arm/include/asm/arch-rockchip/ddr_rk3368.h delete mode 100644 arch/arm/mach-rockchip/rk3368/sdram_rk3368.c create mode 100644 doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt create mode 100644 drivers/ram/rockchip/Makefile create mode 100644 drivers/ram/rockchip/dmc-rk3368.c create mode 100644 include/dt-bindings/memory/rk3368-dmc.h
Apart from that nit:
Reviewed-by: Simon Glass sjg@chromium.org
How can we unify these dram drivers?
I already raised the topic with Kever (as the RK322x driver looks identical on the pctl-side and just has a slightly different PHY): getting these merged is something I expect to happen for v2017.11 … but will require some effort from Rockchip’s team.
In fact, there’s a couple more drivers and quite a bit of infrastructure code that requires de-duplication efforts.
Regards, Philipp.