From: Aaron Williams awilliams@marvell.com
We already have a clock driver for MIPS Octeon. This patch changes the Octeon DT nodes to supply the clock property via the clock driver instead of using an hard-coded value, which is not correct in all cases.
Signed-off-by: Aaron Williams awilliams@marvell.com Signed-off-by: Stefan Roese sr@denx.de Cc: Chandrakala Chavva cchavva@marvell.com Cc: Daniel Schwierzeck daniel.schwierzeck@gmail.com ---
arch/mips/dts/mrvl,cn73xx.dtsi | 2 ++ arch/mips/dts/mrvl,octeon-ebb7304.dts | 4 ---- 2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/mips/dts/mrvl,cn73xx.dtsi b/arch/mips/dts/mrvl,cn73xx.dtsi index 83e5cde044a7..2a17f7a6a63e 100644 --- a/arch/mips/dts/mrvl,cn73xx.dtsi +++ b/arch/mips/dts/mrvl,cn73xx.dtsi @@ -97,6 +97,7 @@ uart0: serial@1180000000800 { compatible = "cavium,octeon-3860-uart","ns16550"; reg = <0x11800 0x00000800 0x0 0x400>; + clocks = <&clk OCTEON_CLK_IO>; clock-frequency = <0>; current-speed = <115200>; reg-shift = <3>; @@ -106,6 +107,7 @@ uart1: serial@1180000000c00 { compatible = "cavium,octeon-3860-uart","ns16550"; reg = <0x11800 0x00000c00 0x0 0x400>; + clocks = <&clk OCTEON_CLK_IO>; clock-frequency = <0>; current-speed = <115200>; reg-shift = <3>; diff --git a/arch/mips/dts/mrvl,octeon-ebb7304.dts b/arch/mips/dts/mrvl,octeon-ebb7304.dts index 1bb34e1329f1..b95c18d34482 100644 --- a/arch/mips/dts/mrvl,octeon-ebb7304.dts +++ b/arch/mips/dts/mrvl,octeon-ebb7304.dts @@ -112,10 +112,6 @@ }; };
-&uart0 { - clock-frequency = <1200000000>; -}; - &i2c0 { u-boot,dm-pre-reloc; /* Needed early for DDR SPD EEPROM */ clock-frequency = <100000>;