Dear Kumar Gala,
In message Pine.LNX.4.64.0909221206300.5780@localhost.localdomain you wrote:
The following changes since commit 3b6a9267f0de7b85d387fa4123d0b58379363447: Wolfgang Denk (1): board/flagadm/flash.c: fix compile warning
are available in the git repository at:
git://git.denx.de/u-boot-mpc85xx.git master
Kumar Gala (15): ppc/85xx: Fix LCRR_CLKDIV defines ppc/85xx: Simplify the top makefile for 36-bit config for MPC8572DS ppc/85xx: Simplify the top makefile for 36-bit config for P2020DS ppc/85xx: Simplify the top makefile for P1_P2_RDB boards ppc/85xx: Clean up p1_p2_rdb PCI setup ppc/85xx: Clean up p2020ds PCI setup code ppc/85xx: Clean up mpc8572DS PCI setup code ppc/85xx: Clean up use of LAWAR defines ppc/p4080: Add p4080 platform immap definitions ppc/p4080: Add support for CoreNet style platform LAWs ppc/p4080: CoreNet platfrom style CCSRBAR setting ppc/p4080: CoreNet platfrom style secondary core release ppc/p4080: Add various p4080 related defines (and p4040) ppc/p4080: Handle timebase enabling and frequency reporting ppc/p4080: Determine various chip frequencies on CoreNet platforms
Mingkai Hu (4): ppc/85xx: simplify the top makefile for 36-bit config for mpc8536ds ppc/85xx: add ld script file for boot from NAND immap_85xx: add porpllsr's plat ratio definition ppc/85xx: add cpu init config file for boot from NAND
Paul Gortmaker (12): sbc8548: replace README with completely new document sbc8548: enable use of PCI network cards sbc8548: delete unused MPC8548CDS info carried over from port sbc8548: get_clock_freq is not valid for this board sbc8548: enable access to second bank of flash sbc8548: remove eTSEC3/4 voltage hack sbc8548: use I/O accessors sbc8548: correct local bus SDRAM size from 64M to 128M fsl_pci: create a SET_STD_PCI_INFO() helper wrapper sbc8548: update PCI/PCI-e support code sbc8548: allow enabling PCI via a make config option sbc85x0: tidy up Makefile to use new configuration script.
Peter Tyser (1): mpc8610hpcd: Use common 86xx fdt fixup code
Poonam Aggrwal (1): ppc/85xx: 32bit DDR changes for P1020/P1011
Vivek Mahajan (1): 85xx-fdt: Fixed l2-ctlr's compatible prop for QorIQ
There have been a few changes requested to some of these patches. I guess you will send an updated pull request when this has been cleaned up?
Best regards,
Wolfgang Denk