On 03/24/2015 12:30 PM, Scott Wood wrote:
On Tue, 2015-03-24 at 12:25 -0700, York Sun wrote:
From: Scott Wood scottwood@freescale.com
This adds NAND boot support for LS2085AQDS, using SPL framework. Details of forming NAND image can be found in README.
Signed-off-by: Scott Wood scottwood@freescale.com Signed-off-by: York Sun yorksun@freescale.com
Changes in v7: Move NAND boot instruction to fsl-lsch3/README. Update board setting to put RCW and u-boot in different NAND block.
Changes in v6: None Changes in v5: Update LS2085AQDS README to include instructions to form NAND image
Changes in v4: Update MAINTAINERS file
Changes in v3: None Changes in v2: None
arch/arm/Kconfig | 1 + arch/arm/cpu/armv8/fsl-lsch3/README | 37 +++++++++++ arch/arm/cpu/armv8/fsl-lsch3/soc.c | 48 +++++++++++++ arch/arm/cpu/armv8/{u-boot.lds => u-boot-spl.lds} | 74 +++++++++------------ arch/arm/include/asm/arch-fsl-lsch3/config.h | 9 +++ arch/arm/lib/crt0_64.S | 7 ++ board/freescale/ls2085aqds/MAINTAINERS | 1 + board/freescale/ls2085aqds/ddr.c | 4 ++ common/spl/spl.c | 2 +- common/spl/spl_nand.c | 2 +- configs/ls2085aqds_nand_defconfig | 4 ++ drivers/misc/fsl_ifc.c | 12 ++++ drivers/mtd/nand/fsl_ifc_spl.c | 2 +- include/configs/ls2085a_common.h | 29 ++++++++ include/configs/ls2085aqds.h | 50 ++++++++++++-- 15 files changed, 231 insertions(+), 51 deletions(-) copy arch/arm/cpu/armv8/{u-boot.lds => u-boot-spl.lds} (57%) create mode 100644 configs/ls2085aqds_nand_defconfig
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 6ba4b8d..f73541c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -652,6 +652,7 @@ config TARGET_LS2085AQDS bool "Support ls2085aqds" select ARM64 select ARMV8_MULTIENTRY
- select SUPPORT_SPL help Support for Freescale LS2085AQDS platform The LS2085A Development System (QDS) is a high-performance
diff --git a/arch/arm/cpu/armv8/fsl-lsch3/README b/arch/arm/cpu/armv8/fsl-lsch3/README index 4f36e2a..eee0228 100644 --- a/arch/arm/cpu/armv8/fsl-lsch3/README +++ b/arch/arm/cpu/armv8/fsl-lsch3/README @@ -95,3 +95,40 @@ mcboottimeout: MC boot timeout in milliseconds. If this variable is not defined
mcmemsize: MC DRAM block size. If this variable is not defined, the value CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE will be assumed.
+Booting from NAND +------------------- +Booting from NAND requires two images, RCW and u-boot-with-spl.bin. +The difference between NAND boot RCW image and NOR boot image is the PBI +command sequence. Below is one example for PBI commands.
+1) CCSR 4-byte write to 0x00e00404, data=0x00000000 +2) CCSR 4-byte write to 0x00e00400, data=0x1800a000 +The above two commands set bootloc register to 0x00000000_1800a000 where +the u-boot code will be running in OCRAM.
+3) Block Copy: SRC=0x0119, SRC_ADDR=0x00080000, DEST_ADDR=0x1800a000, +BLOCK_SIZE=0x00014000 +This command copies u-boot image from NAND device into OCRAM. The values need +to adjust accordingly.
+SRC should match the cfg_rcw_src, the reset config pins.
You should make it clear that this value depends on the type of NAND chip, and that the value for the QDS board is 0x107...
OK. I will 0x107 here and add 0x119 with RDB patch.
+SRC_ADDR is the offset of u-boot image in NAND device. It should match
CONFIG_SYS_NAND_U_BOOT_OFFS. In the example above, it is 512KB.+DEST_ADDR is fixed at 0x1800a000, matching bootloc set above. +BLOCK_SIZE is the size to be copied by PBI.
+RCW image should be written to the beginning of NAND device. Example of using +u-boot command
+nand write <rcw image in memory> 0 <size of rcw image>
+To form the NAND image, build u-boot with NAND config, for example, +ls2085aqds_nand_defconfig. The image needed is u-boot-with-spl.bin.
...especially since this makes it look like the above example is for QDS.
Make sense.
York