On 10/9/2023 6:04 PM, Wu, Fei wrote:
On 9/14/2023 2:05 PM, Heinrich Schuchardt wrote:
Am 14. September 2023 07:30:55 MESZ schrieb Fei Wu fei2.wu@intel.com:
In order to enable PCIe passthrough on qemu riscv, the physical memory range between 3GB and 4GB is reserved. Therefore if guest has 4GB ram, two ranges are created as [2G, 3G) and [4G, 7G), currently u-boot sets ram_top to 4G - 1 if the gd->ram_top is above 4G in
This should move to 7GiB - 1 in your example on riscv64.
board_get_usable_ram_top(), but that address is not backed by ram. This patch selects the lowest range instead.
Signed-off-by: Fei Wu fei2.wu@intel.com
arch/riscv/cpu/generic/dram.c | 2 +- configs/qemu-riscv64_defconfig | 2 +- configs/qemu-riscv64_smode_defconfig | 2 +- configs/qemu-riscv64_spl_defconfig | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/riscv/cpu/generic/dram.c b/arch/riscv/cpu/generic/dram.c index 44e11bd56c..fb53a57b4e 100644 --- a/arch/riscv/cpu/generic/dram.c +++ b/arch/riscv/cpu/generic/dram.c @@ -13,7 +13,7 @@ DECLARE_GLOBAL_DATA_PTR;
int dram_init(void) {
- return fdtdec_setup_mem_size_base();
- return fdtdec_setup_mem_size_base_lowest();
Linaro is working on allowing to download a distro image via https and installing from a RAM disk.
It's okay if we don't do this installation and pcie passthrough together on risc-v, nothing is changed if there is single-range memory, 1GB is large enough for other cases.
So far there are the following methods:
1. use fdtdec_setup_mem_size_base_lowest as this one. This is a change to generic riscv iff the multi-range memory is applied, which is not the case for all the current riscv boards. If there are such memory layout riscv boards in the future, it can have its specialized version.
2. specialize dram_init() for qemu-riscv, it limits the impact only to qemu-riscv, even if there is a need to download image, it doesn't need to enable pcie-passthru at the same time, so no impact from this perspective, the drawback is that qemu cannot reuse the generic logic.
3. a complete solution for multi-range memory layout to select the largest range for all architectures.
Are #1 or #2 acceptable at this stage? If we go #3, can someone help me drive this together to reduce the email ping-pongs?
Thanks, Fei.
We should not artificially reduce the RAM size available for U-Boot by restricting ourselfs to 1 GiB.
We must ensure that ram top is in the upper range.
You mentioned a generic solution for all architectures in another thread, it looks not trivial for me with little background on u-boot, e.g. something is confusing to me, when a board should define CFG_SYS_SDRAM_BASE, what happens if gd->ram_base != CFG_SYS_SDRAM_BASE, I'm not sure if you or anyone can help drive this together. btw, the good part of this patch is that it doesn't change the semantics of ram_base, and the best choice is the largest range, the upper range might not.
Thanks, Fei.
Best regards
Heinrich
}
int dram_init_banksize(void) diff --git a/configs/qemu-riscv64_defconfig b/configs/qemu-riscv64_defconfig index 9a8bbef192..aa55317d26 100644 --- a/configs/qemu-riscv64_defconfig +++ b/configs/qemu-riscv64_defconfig @@ -1,6 +1,6 @@ CONFIG_RISCV=y CONFIG_SYS_MALLOC_LEN=0x800000 -CONFIG_NR_DRAM_BANKS=1 +CONFIG_NR_DRAM_BANKS=2 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_ENV_SIZE=0x20000 diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig index 1d0f021ade..de08a49dab 100644 --- a/configs/qemu-riscv64_smode_defconfig +++ b/configs/qemu-riscv64_smode_defconfig @@ -1,6 +1,6 @@ CONFIG_RISCV=y CONFIG_SYS_MALLOC_LEN=0x800000 -CONFIG_NR_DRAM_BANKS=1 +CONFIG_NR_DRAM_BANKS=2 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_ENV_SIZE=0x20000 diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig index bb10145e6e..66dc2a1dd9 100644 --- a/configs/qemu-riscv64_spl_defconfig +++ b/configs/qemu-riscv64_spl_defconfig @@ -1,6 +1,6 @@ CONFIG_RISCV=y CONFIG_SYS_MALLOC_LEN=0x800000 -CONFIG_NR_DRAM_BANKS=1 +CONFIG_NR_DRAM_BANKS=2 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_ENV_SIZE=0x20000