Dear Stefano Babic,
In message 1263212760-27272-6-git-send-email-sbabic@denx.de you wrote:
The patch adds support for the Freescale mx51 processor.
@@ -49,8 +51,14 @@ #define UART_PHYS 0x1001b000 #elif defined(CONFIG_SYS_MX27_UART6) #define UART_PHYS 0x1001c000 +#elif defined(CONFIG_SYS_MX51_UART1) +#define UART_PHYS UART1_BASE_ADDR +#elif defined(CONFIG_SYS_MX51_UART2) +#define UART_PHYS UART2_BASE_ADDR +#elif defined(CONFIG_SYS_MX51_UART3) +#define UART_PHYS UART3_BASE_ADDR
What happens if - for example - CONFIG_SYS_MX51_UART1 _and_ CONFIG_SYS_MX51_UART2 are defiend? How is CONFIG_SERIAL_MULTI going to be supported?
-#error "define CONFIG_SYS_MX31_UARTx to use the mx31 UART driver" +#error "define CONFIG_SYS_MXxx_UARTx to use the mxxx UART driver"
WHat's "mxxx" supposed to mean? This is not readable.
#ifdef CONFIG_MX31 u32 clk = mx31_get_ipg_clk(); +#elif defined(CONFIG_MX51)
- u32 clk = mxc_get_clock(MXC_UART_CLK);
#else u32 clk = imx_get_perclk1(); #endif
Cannot we have a common clock interface?
Best regards,
Wolfgang Denk