
10 May
2021
10 May
'21
9:06 a.m.
Hi Bin,
From: Bin Meng bmeng.cn@gmail.com Sent: Monday, May 10, 2021 2:58 PM To: Simon Glass sjg@chromium.org; Rick Jian-Zhi Chen(陳建志) rick@andestech.com; u-boot@lists.denx.de Subject: [PATCH v4 00/13] riscv: Switch to use binman to generate u-boot.itb
This series updates binman to handle creation of u-boot.itb image for RISC-V boards.
Azure results: PASS https://dev.azure.com/bmeng/GitHub/_build/results?buildId=363&view=resul...
The following tests were performed:
- booting qemu-riscv{32|64}_spl_defconfig on QEMU virt
- booting sifive_unleashed_defconfig on QEMU sifive_u
AE350 SPL defconfigs are not tested. @Rick, could you please test and report?
OK. I will verify it on AE350.
Thanks, Rick