No functional change, moving cache manipulation functions into cache.c allows to collect all of them in a single location and as a pleasant side effect cache_control() function can be unexported now.
Signed-off-by: Vladimir Zapolskiy vz@mleia.com --- arch/sh/cpu/sh4/cache.c | 39 ++++++++++++++++++++++++++++++++++++--- arch/sh/cpu/sh4/cpu.c | 34 ---------------------------------- arch/sh/include/asm/cache.h | 2 -- 3 files changed, 36 insertions(+), 39 deletions(-)
diff --git a/arch/sh/cpu/sh4/cache.c b/arch/sh/cpu/sh4/cache.c index 7750f0f..6175c67 100644 --- a/arch/sh/cpu/sh4/cache.c +++ b/arch/sh/cpu/sh4/cache.c @@ -1,6 +1,6 @@ /* - * (C) Copyright 2007 - * Nobuhiro Iwamatsu iwamatsu@nigauri.org + * (C) Copyright 2016 Vladimir Zapolskiy vz@mleia.com + * (C) Copyright 2007 Nobuhiro Iwamatsu iwamatsu@nigauri.org * * SPDX-License-Identifier: GPL-2.0+ */ @@ -35,7 +35,7 @@ static inline void cache_wback_all(void) #define CACHE_ENABLE 0 #define CACHE_DISABLE 1
-int cache_control(unsigned int cmd) +static int cache_control(unsigned int cmd) { unsigned long ccr;
@@ -75,3 +75,36 @@ void invalidate_dcache_range(unsigned long start, unsigned long end) : "m" (__m(v))); } } + +void flush_cache(unsigned long addr, unsigned long size) +{ + flush_dcache_range(addr , addr + size); +} + +void icache_enable(void) +{ + cache_control(CACHE_ENABLE); +} + +void icache_disable(void) +{ + cache_control(CACHE_DISABLE); +} + +int icache_status(void) +{ + return 0; +} + +void dcache_enable(void) +{ +} + +void dcache_disable(void) +{ +} + +int dcache_status(void) +{ + return 0; +} diff --git a/arch/sh/cpu/sh4/cpu.c b/arch/sh/cpu/sh4/cpu.c index e6b5c86..aa8d4df 100644 --- a/arch/sh/cpu/sh4/cpu.c +++ b/arch/sh/cpu/sh4/cpu.c @@ -9,7 +9,6 @@ #include <command.h> #include <netdev.h> #include <asm/processor.h> -#include <asm/cache.h>
int checkcpu(void) { @@ -35,39 +34,6 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return 0; }
-void flush_cache (unsigned long addr, unsigned long size) -{ - flush_dcache_range(addr , addr + size); -} - -void icache_enable (void) -{ - cache_control(0); -} - -void icache_disable (void) -{ - cache_control(1); -} - -int icache_status (void) -{ - return 0; -} - -void dcache_enable (void) -{ -} - -void dcache_disable (void) -{ -} - -int dcache_status (void) -{ - return 0; -} - int cpu_eth_init(bd_t *bis) { #ifdef CONFIG_SH_ETHER diff --git a/arch/sh/include/asm/cache.h b/arch/sh/include/asm/cache.h index abaf405..b548a35 100644 --- a/arch/sh/include/asm/cache.h +++ b/arch/sh/include/asm/cache.h @@ -3,8 +3,6 @@
#if defined(CONFIG_CPU_SH4)
-int cache_control(unsigned int cmd); - #define L1_CACHE_BYTES 32
struct __large_struct { unsigned long buf[100]; };