Gasket needs a different configuration for 10BaseT than for higher speeds.
Signed-off-by: Timo Ketola timo@exertus.fi --- drivers/net/fec_mxc.c | 43 ++++++++++++++++++++++++------------------- 1 files changed, 24 insertions(+), 19 deletions(-)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 824a199..48a69d4 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -440,6 +440,22 @@ static int fec_open(struct eth_device *edev) */ writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_ETHER_EN, &fec->eth->ecntrl); +#ifdef CONFIG_PHYLIB + if (!fec->phydev) + fec_eth_phy_config(edev); + if (fec->phydev) { + /* Start up the PHY */ + phy_startup(fec->phydev); + speed = fec->phydev->speed; + } else { + speed = _100BASET; + } +#else + miiphy_wait_aneg(edev); + speed = miiphy_speed(edev->name, fec->phy_id); + miiphy_duplex(edev->name, fec->phy_id); +#endif + #if defined(CONFIG_MX25) || defined(CONFIG_MX53) udelay(100); /* @@ -453,9 +469,14 @@ static int fec_open(struct eth_device *edev) while (readw(&fec->eth->miigsk_enr) & MIIGSK_ENR_READY) udelay(2);
-#if !defined(CONFIG_MII) - /* configure gasket for RMII, 50 MHz, no loopback, and no echo */ - writew(MIIGSK_CFGR_IF_MODE_RMII, &fec->eth->miigsk_cfgr); +#if defined(CONFIG_RMII) + if (speed != _10BASET) + /* configure gasket for RMII, 50MHz, no loopback, and no echo */ + writew(MIIGSK_CFGR_IF_MODE_RMII, &fec->eth->miigsk_cfgr); + else + /* configure gasket for RMII, 5MHz, no loopback, and no echo */ + writew(MIIGSK_CFGR_IF_MODE_RMII | MIIGSK_CFGR_FRCONT, + &fec->eth->miigsk_cfgr); #else /* configure gasket for MII, no loopback, and no echo */ writew(MIIGSK_CFGR_IF_MODE_MII, &fec->eth->miigsk_cfgr); @@ -474,22 +495,6 @@ static int fec_open(struct eth_device *edev) } #endif
-#ifdef CONFIG_PHYLIB - if (!fec->phydev) - fec_eth_phy_config(edev); - if (fec->phydev) { - /* Start up the PHY */ - phy_startup(fec->phydev); - speed = fec->phydev->speed; - } else { - speed = _100BASET; - } -#else - miiphy_wait_aneg(edev); - speed = miiphy_speed(edev->name, fec->phy_id); - miiphy_duplex(edev->name, fec->phy_id); -#endif - #ifdef FEC_QUIRK_ENET_MAC { u32 ecr = readl(&fec->eth->ecntrl) & ~FEC_ECNTRL_SPEED;