Trying to respond inline:
On 06/17/2016 09:39 AM, Christian Didriksson wrote:
Hi Marek,
I applied the two patches you suggested, but got no change in behavior:
U-Boot SPL 2016.05-ga0bd0e7-dirty (Jun 17 2016 - 16:32:35) drivers/ddr/altera/sequencer.c: Preparing to start memory calibration drivers/ddr/altera/sequencer.c: CALIBRATION PASSED drivers/ddr/altera/sequencer.c: Calibration complete Trying to boot from SPI
I haven't tested on QSPI. I tested my patch on a board with SD/MMC. I'll check it on a QSPI board shortly.
U-Boot 2016.05-ga0bd0e7-dirty (Jun 17 2016 - 16:32:35 +0200)
CPU: Altera SoCFPGA Platform FPGA: Altera Cyclone V, SE/A6 or SX/C6 or ST/D6, version 0x0 BOOT: QSPI Flash (1.8V) Watchdog enabled I2C: ready DRAM: 1 GiB
Best regards,
Christian
On 06/16/2016 12:13 PM, Christian Didriksson wrote:
Hi!
Hi,
On 06/15/2016 12:06 PM, Christian Didriksson wrote:
Trying again.
Hi!
I have reverted back to a vanilla u-boot-2016.05, added the not-enter-quad-mode patch
What's this patch ? Can you share it ?
[...]
Thanks
Some comments:
We want to run ECC, but I don't think the SPL supports scrubbing etc. yet so
I undefined those qts-parameters. Am I right regarding ECC for SDRAM?
Yes, in order for ECC, you need to scrub the SDRAM. I'll look to see what is needed.
Dinh