From 83f7ae49425f53861420ecb5576c9117d1ec2c0f Mon Sep 17 00:00:00 2001
From: Santi Pagola <santipagola@gmail.com>
Date: Thu, 11 Oct 2018 08:59:25 +0200
Subject: [PATCH] add u-boot support for imote2 board

---
 arch/arm/Kconfig                       |   5 +
 arch/arm/cpu/pxa/pxa2xx.c              |   2 +-
 arch/arm/cpu/pxa/timer.c               |   1 +
 arch/arm/cpu/pxa/usb.c                 |   2 +-
 arch/arm/include/asm/arch-pxa/config.h |   2 +-
 arch/arm/include/asm/config.h          |   2 +-
 board/crossbow/imote2/Kconfig          |  34 ++++
 board/crossbow/imote2/MAINTAINERS      |   6 +
 board/crossbow/imote2/Makefile         |   8 +
 board/crossbow/imote2/imote2.c         | 161 +++++++++++++++
 configs/imote2_defconfig               |  15 ++
 drivers/mmc/pxa_mmc_gen.c              |   4 +-
 drivers/serial/serial_pxa.c            |   4 +-
 include/configs/imote2.h               | 259 +++++++++++++++++++++++++
 include/serial.h                       |   6 +
 15 files changed, 503 insertions(+), 8 deletions(-)
 create mode 100644 board/crossbow/imote2/Kconfig
 create mode 100644 board/crossbow/imote2/MAINTAINERS
 create mode 100644 board/crossbow/imote2/Makefile
 create mode 100644 board/crossbow/imote2/imote2.c
 create mode 100644 configs/imote2_defconfig
 create mode 100644 include/configs/imote2.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ccf2a844be..1f903363f4 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1241,6 +1241,10 @@ config TARGET_COLIBRI_PXA270
 	bool "Support colibri_pxa270"
 	select CPU_PXA
 
+config TARGET_IMOTE2
+    bool "Support for Intel Mote 2 development platform"
+    select CPU_PXA
+
 config ARCH_UNIPHIER
 	bool "Socionext UniPhier SoCs"
 	select BOARD_LATE_INIT
@@ -1516,6 +1520,7 @@ source "board/xilinx/Kconfig"
 source "board/xilinx/zynq/Kconfig"
 source "board/xilinx/zynqmp/Kconfig"
 source "board/zipitz2/Kconfig"
+source "board/crossbow/imote2/Kconfig"
 
 source "arch/arm/Kconfig.debug"
 
diff --git a/arch/arm/cpu/pxa/pxa2xx.c b/arch/arm/cpu/pxa/pxa2xx.c
index b9fd41ece2..e092da93c2 100644
--- a/arch/arm/cpu/pxa/pxa2xx.c
+++ b/arch/arm/cpu/pxa/pxa2xx.c
@@ -10,7 +10,7 @@
  */
 
 #include <common.h>
-#include <asm/arch/pxa-regs.h>
+#include <asm/arch-pxa/pxa-regs.h>
 #include <asm/io.h>
 #include <asm/system.h>
 #include <command.h>
diff --git a/arch/arm/cpu/pxa/timer.c b/arch/arm/cpu/pxa/timer.c
index 169fed808b..ca05498c0a 100644
--- a/arch/arm/cpu/pxa/timer.c
+++ b/arch/arm/cpu/pxa/timer.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <asm/io.h>
+#include <asm/arch-pxa/config.h>
 
 int timer_init(void)
 {
diff --git a/arch/arm/cpu/pxa/usb.c b/arch/arm/cpu/pxa/usb.c
index 80a5977415..8d906c6579 100644
--- a/arch/arm/cpu/pxa/usb.c
+++ b/arch/arm/cpu/pxa/usb.c
@@ -9,7 +9,7 @@
 #if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT)
 # if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_CPU_PXA27X)
 
-#include <asm/arch/pxa-regs.h>
+#include <asm/arch-pxa/pxa-regs.h>
 #include <asm/io.h>
 #include <usb.h>
 
diff --git a/arch/arm/include/asm/arch-pxa/config.h b/arch/arm/include/asm/arch-pxa/config.h
index 75b0e491ed..7a2512af87 100644
--- a/arch/arm/include/asm/arch-pxa/config.h
+++ b/arch/arm/include/asm/arch-pxa/config.h
@@ -6,7 +6,7 @@
 #ifndef _ASM_ARM_PXA_CONFIG_
 #define _ASM_ARM_PXA_CONFIG_
 
-#include <asm/arch/pxa-regs.h>
+#include <asm/arch-pxa/pxa-regs.h>
 
 /*
  * Generic timer support
diff --git a/arch/arm/include/asm/config.h b/arch/arm/include/asm/config.h
index bf692ce279..fed4453470 100644
--- a/arch/arm/include/asm/config.h
+++ b/arch/arm/include/asm/config.h
@@ -14,7 +14,7 @@
 	defined(CONFIG_CPU_MONAHANS) || \
 	defined(CONFIG_CPU_PXA25X) || \
 	defined(CONFIG_FSL_LAYERSCAPE)
-#include <asm/arch/config.h>
+#include <asm/arch-pxa/config.h>
 #endif
 
 #endif
diff --git a/board/crossbow/imote2/Kconfig b/board/crossbow/imote2/Kconfig
new file mode 100644
index 0000000000..5d22636ed8
--- /dev/null
+++ b/board/crossbow/imote2/Kconfig
@@ -0,0 +1,34 @@
+if TARGET_IMOTE2
+
+config SYS_BOARD
+	default "imote2"
+
+config SYS_VENDOR
+	default "crossbow"
+
+config SYS_SOC
+    default "pxa2xx"
+
+config SYS_CPU
+    default "pxa2xx"
+
+config SYS_CONFIG_NAME
+	default "imote2"
+
+config PXA27X
+    bool
+    default y
+
+config CMD_ENV
+    bool
+    default y
+
+config PXA_MMC
+    bool
+    default y
+
+config PXA_MMC_GENERIC
+    bool
+    default y
+
+endif
diff --git a/board/crossbow/imote2/MAINTAINERS b/board/crossbow/imote2/MAINTAINERS
new file mode 100644
index 0000000000..5fe5d6fdd0
--- /dev/null
+++ b/board/crossbow/imote2/MAINTAINERS
@@ -0,0 +1,6 @@
+INTEL MOTE 2 BOARD
+M:	Santiago Pagola <sanpa993@student.liu.se>
+S:	Maintained
+F:	board/crossbow/imote2/
+F:	include/configs/imote2.h
+F:	configs/imote2_defconfig
diff --git a/board/crossbow/imote2/Makefile b/board/crossbow/imote2/Makefile
new file mode 100644
index 0000000000..62419e0f6e
--- /dev/null
+++ b/board/crossbow/imote2/Makefile
@@ -0,0 +1,8 @@
+#
+# Filename:			Makefile
+#
+# Author:			Santiago Pagola <sanpa993@student.liu.se>
+# Brief:			Makefile for the iMote2 development board
+# Last modified:	tis okt  11 09:01:17 EDT 2018
+
+obj-y	:= imote2.o
diff --git a/board/crossbow/imote2/imote2.c b/board/crossbow/imote2/imote2.c
new file mode 100644
index 0000000000..4c27d557a1
--- /dev/null
+++ b/board/crossbow/imote2/imote2.c
@@ -0,0 +1,161 @@
+/*
+ * Copyright (C) 2010
+ * liu xue <liuxuenetmail@gmail.com>
+ *
+ * Intel Imote2 Support
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+// #include <common.h>
+#include <dm.h>
+#include <command.h>
+#include <serial.h>
+#include <asm/arch-pxa/hardware.h>
+#include <asm/arch-pxa/regs-mmc.h>
+#include <asm/arch-pxa/regs-uart.h>
+#include <dm/platdata.h>
+#include <dm/platform_data/serial_pxa.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+extern void pxa2xx_dram_init(void);
+
+/*
+ * Miscelaneous platform dependent initialisations
+ */
+
+int board_init (void)
+{
+	/* We have RAM, disable cache */
+	dcache_disable();
+	icache_disable();
+
+	/* arch number of Imote2 */
+	gd->bd->bi_arch_number = MACH_TYPE_INTELMOTE2;
+
+	/* adress of boot parameters */
+    gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+
+	/* Enable LCD */
+	//lcd_start();
+
+	return 0;
+}
+
+int checkboard(void)
+{
+    puts("Model: Intel Mote 2 - PXA271\n");
+
+	return 0;
+}
+
+struct serial_device *default_serial_console (void)
+{
+    return &serial_ffuart_device;
+}
+
+int dram_init(void)
+{
+    pxa2xx_dram_init();
+	gd->ram_size = PHYS_SDRAM_1_SIZE;
+	return 0;
+}
+
+int dram_init_banksize(void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+    return 0;
+}
+
+#ifdef	CONFIG_CMD_USB
+int usb_board_init(void)
+{
+	writel((readl(UHCHR) | UHCHR_PCPL | UHCHR_PSPL) &
+		~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
+		UHCHR);
+
+	writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
+
+	while (UHCHR & UHCHR_FSBIR);
+
+	writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR);
+	writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE);
+
+	/* Clear any OTG Pin Hold */
+	if (readl(PSSR) & PSSR_OTGPH)
+		writel(readl(PSSR) | PSSR_OTGPH, PSSR);
+
+	writel(readl(UHCRHDA) & ~(0x200), UHCRHDA);
+	writel(readl(UHCRHDA) | 0x100, UHCRHDA);
+
+	/* Set port power control mask bits, only 3 ports. */
+	writel(readl(UHCRHDB) | (0x7<<17), UHCRHDB);
+
+	/* enable port 2 */
+	writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
+		UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
+
+	return 0;
+}
+
+void usb_board_init_fail(void)
+{
+	return;
+}
+
+void usb_board_stop(void)
+{
+	writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
+	udelay(11);
+	writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
+
+	writel(readl(UHCCOMS) | 1, UHCCOMS);
+	udelay(10);
+
+	writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
+
+	return;
+}
+#endif
+
+#ifdef CONFIG_CMD_MMC
+int board_mmc_init(bd_t * bis)
+{
+    pxa_mmc_register(0);
+
+    return 0;
+}
+#endif
+
+#if 0
+static const struct pxa_serial_platdata serial_platdata = {
+	.base = (struct pxa_uart_regs *)FFUART_BASE,
+	.port = FFUART_INDEX,
+	.baudrate = CONFIG_BAUDRATE,
+};
+
+U_BOOT_DEVICE(pxa_serials) = {
+	.name = "serial_pxa",
+	.platdata = &serial_platdata,
+};
+#endif
diff --git a/configs/imote2_defconfig b/configs/imote2_defconfig
new file mode 100644
index 0000000000..efa2986b81
--- /dev/null
+++ b/configs/imote2_defconfig
@@ -0,0 +1,15 @@
+CONFIG_ARM=y
+CONFIG_ARCH_PXA=y
+CONFIG_TARGET_IMOTE2=y
+CONFIG_FS_FAT=y
+CONFIG_SYS_TEXT_BASE=0xa0000000
+CONFIG_IDENT_STRING="-imote2"
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_PXA_SERIAL=y
+CONFIG_CONS_INDEX=3
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_MMC=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_EXT2=y
+CONFIG_DOS_PARTITION=y
diff --git a/drivers/mmc/pxa_mmc_gen.c b/drivers/mmc/pxa_mmc_gen.c
index a4dcdb5cff..cec783be00 100644
--- a/drivers/mmc/pxa_mmc_gen.c
+++ b/drivers/mmc/pxa_mmc_gen.c
@@ -6,8 +6,8 @@
  */
 
 #include <common.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/regs-mmc.h>
+#include <asm/arch-pxa/hardware.h>
+#include <asm/arch-pxa/regs-mmc.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <malloc.h>
diff --git a/drivers/serial/serial_pxa.c b/drivers/serial/serial_pxa.c
index cf4d8f6442..b66d25a366 100644
--- a/drivers/serial/serial_pxa.c
+++ b/drivers/serial/serial_pxa.c
@@ -20,8 +20,8 @@
  */
 
 #include <common.h>
-#include <asm/arch/pxa-regs.h>
-#include <asm/arch/regs-uart.h>
+#include <asm/arch-pxa/pxa-regs.h>
+#include <asm/arch-pxa/regs-uart.h>
 #include <asm/io.h>
 #include <dm.h>
 #include <dm/platform_data/serial_pxa.h>
diff --git a/include/configs/imote2.h b/include/configs/imote2.h
new file mode 100644
index 0000000000..6fe247b183
--- /dev/null
+++ b/include/configs/imote2.h
@@ -0,0 +1,259 @@
+/*
+ * Intel imote2 configuration file
+ *
+ * Copyright (C) 2010 liu xue <liuxuenetmail@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __IMOTE2_CONFIG_H
+#define __IMOTE2_CONFIG_H
+
+/* #define   DEBUG */
+
+/*
+ * High Level Board Configuration Options
+ */
+#define   CONFIG_PXA27X                         1    /* Marvell PXA270 CPU */
+#define   CONFIG_CPU_PXA27X                     1    /* Marvell PXA270 CPU */
+/* #define   CONFIG_IMOTE2                      1     // Intel Imote2 board */
+
+#undef    BOARD_LATE_INIT
+#undef    CONFIG_USE_IRQ
+#undef    CONFIG_SKIP_LOWLEVEL_INIT
+
+/*
+ * Environment settings
+ */
+#define   CONFIG_ENV_OVERWRITE
+#define   CONFIG_ENV_IS_IN_FLASH        1
+#define   CONFIG_ENV_ADDR            0x40000
+#define   CONFIG_ENV_SIZE            0x20000
+
+#define   CONFIG_SYS_MALLOC_LEN        (128*1024)
+#define   CONFIG_ARCH_CPU_INIT
+
+#define   CONFIG_BOOTCOMMAND                        \
+    "if mmc init && fatload mmc 0 0xa0000000 uboot.script ; then "    \
+        "source 0xa0000000; "                    \
+    "else "                                \
+        "bootm 0x60000; "                    \
+    "fi; "
+#define   CONFIG_BOOTARGS                            \
+    "console=tty0 console=ttyS2,115200 fbcon=rotate:3"
+#define   CONFIG_TIMESTAMP
+#define   CONFIG_BOOTDELAY        2    /* Autoboot delay */
+#define   CONFIG_CMDLINE_TAG
+#define   CONFIG_SETUP_MEMORY_TAGS
+/* #define   CONFIG_SYS_TEXT_BASE        0x0 */
+/*#define  CONFIG_LZMA            // LZMA compression support */ 
+
+/*
+ * Serial Console Configuration
+ * FFUART - the lower serial port on imote2 board
+ */
+/* #define   CONFIG_PXA_SERIAL */
+#define   CONFIG_FFUART                1
+/* #define   CONFIG_STUART                1*/
+#define   CONFIG_BAUDRATE                115200
+#define   CONFIG_SYS_BAUDRATE_TABLE    { 9600, 19200, 38400, 57600, 115200 }
+
+#undef    CONFIG_CMD_NET
+#undef    CONFIG_CMD_NFS
+/*#define   CONFIG_CMD_ENV*/
+#undef    CONFIG_CMD_IMLS
+/*#define    CONFIG_CMD_MMC */
+/*#define    CONFIG_CMD_SPI */
+#define   CONFIG_CMD_USB
+
+/*
+ * MMC Card Configuration
+ */
+#ifdef    CONFIG_CMD_MMC
+/* #define   CONFIG_MMC*/
+/*#define   CONFIG_PXA_MMC*/
+#define   CONFIG_SYS_MMC_BASE        0xF0000000
+/*#define   CONFIG_CMD_FAT*/
+/*#define   CONFIG_CMD_EXT2*/
+/*#define   CONFIG_DOS_PARTITION*/
+#endif
+
+/*
+ * KGDB
+ */
+#ifdef    CONFIG_CMD_KGDB
+#define   CONFIG_KGDB_BAUDRATE        230400        /* speed to run kgdb serial port */
+#define   CONFIG_KGDB_SER_INDEX        2        /* which serial port to use */
+#endif
+
+/*
+ * HUSH Shell Configuration
+ */
+#if 0
+// #define   CONFIG_SYS_HUSH_PARSER        1
+// #define   CONFIG_SYS_PROMPT_HUSH_PS2    "> "
+
+// #define   CONFIG_SYS_LONGHELP                /* undef to save memory    */
+// #ifdef    CONFIG_SYS_HUSH_PARSER
+// #define   CONFIG_SYS_PROMPT        "$ "        /* Monitor Command Prompt */
+// #else
+// #define   CONFIG_SYS_PROMPT        "=> "        /* Monitor Command Prompt */
+// #endif
+#endif
+#define   CONFIG_SYS_CBSIZE        256        /* Console I/O Buffer Size */
+#define   CONFIG_SYS_PBSIZE        (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)    /* Print Buffer Size */
+#define   CONFIG_SYS_MAXARGS        16        /* max number of command args */
+#define   CONFIG_SYS_BARGSIZE        CONFIG_SYS_CBSIZE    /* Boot Argument Buffer Size */
+#define   CONFIG_SYS_DEVICE_NULLDEV    1
+
+/*
+ * Clock Configuration
+ */
+#undef    CONFIG_SYS_CLKS_IN_HZ
+/* #define   CONFIG_SYS_HZ                         3250000        // Timer @ 3250000 Hz*/
+#define   CONFIG_SYS_CPUSPEED                   0x190        /* standard setting for 312MHz; L=16, N=1.5, A=0, SDCLK!=SystemBus */
+
+/*
+ * Stack sizes
+ */
+/* #define   CONFIG_STACKSIZE                      (128*1024)    // regular stack */
+#ifdef    CONFIG_USE_IRQ
+#define   CONFIG_STACKSIZE_IRQ                  (4*1024)    /* IRQ stack */
+#define   CONFIG_STACKSIZE_FIQ                  (4*1024)    /* FIQ stack */
+#endif
+
+/*
+ * DRAM Map
+ */
+/* #define   CONFIG_NR_DRAM_BANKS                  1             // We have 1 bank of DRAM */
+#define   PHYS_SDRAM_1                          0xa0000000    /* SDRAM Bank #1 */
+#define   PHYS_SDRAM_1_SIZE                     0x02000000    /* 32 MB */
+
+#define   CONFIG_SYS_DRAM_BASE                  0xa0000000    /* CS0 */
+#define   CONFIG_SYS_DRAM_SIZE                  0x02000000    /* 32 MB DRAM */
+
+#define   CONFIG_SYS_MEMTEST_START              0xa0400000    /* memtest works on */
+#define   CONFIG_SYS_MEMTEST_END                0xa0800000    /* 4 ... 8 MB in DRAM */
+
+#define   CONFIG_SYS_LOAD_ADDR                  CONFIG_SYS_DRAM_BASE
+
+#define   CONFIG_SYS_SDRAM_BASE                 PHYS_SDRAM_1
+#define   CONFIG_SYS_INIT_SP_ADDR               (GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1 + 2048)
+
+/*
+ * NOR FLASH
+ */
+#define   PHYS_FLASH_1                          0x00000000    /* Flash Bank #1 */
+#define   PHYS_FLASH_SIZE                       0x02000000    /* 32 MB */
+#define   PHYS_FLASH_SECT_SIZE                  0x00010000    /* 64 KB sectors */
+#define   CONFIG_SYS_FLASH_BASE                 PHYS_FLASH_1
+
+#define   CONFIG_SYS_FLASH_CFI
+#define   CONFIG_FLASH_CFI_DRIVER               1
+#define   CONFIG_SYS_FLASH_CFI_WIDTH            FLASH_CFI_16BIT
+
+#define   CONFIG_SYS_MONITOR_BASE               PHYS_FLASH_1
+#define   CONFIG_SYS_MONITOR_LEN                PHYS_FLASH_SECT_SIZE
+
+#define   CONFIG_SYS_MAX_FLASH_BANKS            1
+#define   CONFIG_SYS_MAX_FLASH_SECT             256
+
+#define   CONFIG_SYS_FLASH_USE_BUFFER_WRITE     1
+
+#define   CONFIG_SYS_FLASH_ERASE_TOUT           (2*CONFIG_SYS_HZ)
+#define   CONFIG_SYS_FLASH_WRITE_TOUT           (2*CONFIG_SYS_HZ)
+#define   CONFIG_SYS_FLASH_LOCK_TOUT            (2*CONFIG_SYS_HZ)
+#define   CONFIG_SYS_FLASH_UNLOCK_TOUT          (2*CONFIG_SYS_HZ)
+#define   CONFIG_SYS_FLASH_PROTECTION
+/*#define   CONFIG_MTD_NOR_FLASH                  1*/
+
+/*
+ * GPIO settings
+ */
+#define   CONFIG_SYS_GAFR0_L_VAL               0x94F00000
+#define   CONFIG_SYS_GAFR0_U_VAL               0x015A859A
+#define   CONFIG_SYS_GAFR1_L_VAL               0x999A150A
+#define   CONFIG_SYS_GAFR1_U_VAL               0x0005A0AA
+#define   CONFIG_SYS_GAFR2_L_VAL               0x6AA00000
+#define   CONFIG_SYS_GAFR2_U_VAL               0x55A8001A
+#define   CONFIG_SYS_GAFR3_L_VAL               0x56AA87FB
+#define   CONFIG_SYS_GAFR3_U_VAL               0x00000001
+
+#define   CONFIG_SYS_GPCR0_VAL                 0x00001000
+#define   CONFIG_SYS_GPCR1_VAL                 0x00000000
+#define   CONFIG_SYS_GPCR2_VAL                 0x00000000
+#define   CONFIG_SYS_GPCR3_VAL                 0x00000000
+
+#define   CONFIG_SYS_GPDR0_VAL                 0xC27B9C04
+#define   CONFIG_SYS_GPDR1_VAL                 0x00EFAA83
+#define   CONFIG_SYS_GPDR2_VAL                 0x0E23FC00
+#define   CONFIG_SYS_GPDR3_VAL                 0x001E1F81
+
+#define   CONFIG_SYS_GPSR0_VAL                 0x00708800
+#define   CONFIG_SYS_GPSR1_VAL                 0x03cf0002
+#define   CONFIG_SYS_GPSR2_VAL                 0x0021FC00
+#define   CONFIG_SYS_GPSR3_VAL                 0x00000000
+
+#define   CONFIG_SYS_PSSR_VAL                  0x30
+
+/*
+ * Clock settings
+ */
+#define   CONFIG_SYS_CKEN                      0x00511220
+#define   CONFIG_SYS_CCCR                      0x00000190
+
+/*
+ * Memory settings
+ */
+#define   CONFIG_SYS_MSC0_VAL                  0x39F2A7A3
+#define   CONFIG_SYS_MSC1_VAL                  0x0000A691
+#define   CONFIG_SYS_MSC2_VAL                  0x0000B884
+#define   CONFIG_SYS_MDCNFG_VAL                0x00000AC9
+#define   CONFIG_SYS_MDREFR_VAL                0x00000018
+#define   CONFIG_SYS_MDMRS_VAL                 0x00000000
+
+/* not chang yet */
+#define   CONFIG_SYS_FLYCNFG_VAL               0x00010001
+#define   CONFIG_SYS_SXCNFG_VAL                0x40044004
+
+/*
+ * PCMCIA and CF Interfaces
+ */
+#define   CONFIG_SYS_MECR_VAL                  0x00000001
+#define   CONFIG_SYS_MCMEM0_VAL                0x00014307
+#define   CONFIG_SYS_MCMEM1_VAL                0x00014307
+#define   CONFIG_SYS_MCATT0_VAL                0x0001c787
+#define   CONFIG_SYS_MCATT1_VAL                0x0001c787
+#define   CONFIG_SYS_MCIO0_VAL                 0x0001430f
+#define   CONFIG_SYS_MCIO1_VAL                 0x0001430f
+
+/*
+ * USB
+ */
+#ifdef CONFIG_CMD_USB
+#define   CONFIG_USB_OHCI_NEW
+#define   CONFIG_SYS_USB_OHCI_CPU_INIT
+#define   CONFIG_SYS_USB_OHCI_BOARD_INIT
+#define   CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS   2
+#define   CONFIG_SYS_USB_OHCI_REGS_BASE        0x4C000000
+#define   CONFIG_SYS_USB_OHCI_SLOT_NAME        "imote2"
+#define   CONFIG_USB_STORAGE
+/*#define   CONFIG_DOS_PARTITION*/
+/*#define   CONFIG_CMD_FAT*/
+/*#define   CONFIG_CMD_EXT2*/
+#endif
+
+#endif    /* __IMOTE2_CONFIG_H */
diff --git a/include/serial.h b/include/serial.h
index 020cd392e8..7061b9ec41 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -34,6 +34,12 @@ extern struct serial_device serial0_device;
 extern struct serial_device serial1_device;
 #endif
 
+#if defined(CONFIG_CPU_PXA)
+#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_PXA27X) || defined(CONFIG_CPU_PXA25X)
+extern struct serial_device serial_ffuart_device;
+#endif
+#endif
+
 extern struct serial_device eserial1_device;
 extern struct serial_device eserial2_device;
 extern struct serial_device eserial3_device;
-- 
2.19.1

