Does anybody know, what can be tuned in "lowlevel_init" procedure in lowlevel_init.S module for at91rm9200dk? This init suspends u-boot. I
WD> The code is supposed to work fine on the at91rm9200dk board. WD> Are you really using such a board, or is this some custom hardware?
Yes, my board is customozed - the hardware engineer edited RomBoot because of some differences in SDRAM system.
But... anyway, the lowlevel_init.S seems so strange, that some bug in its code is suspected.
Would you explain the meaning of _MTEXT_BASE in fragments like this:
ldr r0, =SMRDATA1 ldr r1, _MTEXT_BASE sub r0, r0, r1 add r2, r0, #176 2: /* the address */ ldr r1, [r0], #4 /* the value */ ldr r3, [r0], #4 str r3, [r1] cmp r2, r0 bne 2b
I guess _MTEXT_BASE is a start of code, the location just after vectors. But what's the use of it here?
Suspecting hardware problem, I skip everything after the first step of the procedure:
/* Get the CKGR Base Address */ ldr r1, =AT91C_BASE_CKGR /* Main oscillator Enable register */ #ifdef CFG_USE_MAIN_OSCILLATOR ldr r0, =0x0000FF01 /* Enable main oscillator */ #else ldr r0, =0x0000FF00 /* Disable main oscillator */ #endif str r0, [r1, #CKGR_MOR] ... /* delay */ b exit
This cut works fine, u-boot loads. Next, I tried to replace this with the following:
ldr r0, =CKGRDATA ldr r1, _MTEXT_BASE sub r0, r0, r1 add r2, r0, #8 /* 8 bytes */ 3: /* the address */ ldr r1, [r0], #4 /* the value */ ldr r3, [r0], #4 str r3, [r1] cmp r2, r0 bne 3b ... /* delay */
...
CKGRDATA: .word AT91C_BASE_CKGR .word 0x0000FF01 /* 8 bytes long */
It FAILS! Obviously, u-boot crashes here. Something wrong in code...
Best regards,