This converts the following to Kconfig: CONFIG_BACKSIDE_L2_CACHE
Signed-off-by: Tom Rini trini@konsulko.com --- arch/powerpc/cpu/mpc85xx/Kconfig | 10 ++++++++++ include/configs/P2041RDB.h | 1 - include/configs/T102xRDB.h | 1 - include/configs/T104xRDB.h | 1 - include/configs/corenet_ds.h | 1 - include/configs/kmcent2.h | 1 - 6 files changed, 10 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index b06416a90e83..509f356e4961 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -523,6 +523,7 @@ config ARCH_P2020
config ARCH_P2041 bool + select BACKSIDE_L2_CACHE select E500MC select FSL_LAW select SYS_CACHE_SHIFT_6 @@ -548,6 +549,7 @@ config ARCH_P2041
config ARCH_P3041 bool + select BACKSIDE_L2_CACHE select E500MC select FSL_LAW select SYS_CACHE_SHIFT_6 @@ -578,6 +580,7 @@ config ARCH_P3041
config ARCH_P4080 bool + select BACKSIDE_L2_CACHE select E500MC select FSL_LAW select SYS_CACHE_SHIFT_6 @@ -617,6 +620,7 @@ config ARCH_P4080
config ARCH_P5040 bool + select BACKSIDE_L2_CACHE select E500MC select FSL_LAW select SYS_CACHE_SHIFT_6 @@ -647,6 +651,7 @@ config ARCH_QEMU_E500
config ARCH_T1024 bool + select BACKSIDE_L2_CACHE select E500MC select FSL_LAW select SYS_CACHE_SHIFT_6 @@ -670,6 +675,7 @@ config ARCH_T1024
config ARCH_T1040 bool + select BACKSIDE_L2_CACHE select E500MC select FSL_LAW select SYS_CACHE_SHIFT_6 @@ -693,6 +699,7 @@ config ARCH_T1040
config ARCH_T1042 bool + select BACKSIDE_L2_CACHE select E500MC select FSL_LAW select SYS_CACHE_SHIFT_6 @@ -1108,6 +1115,9 @@ config SYS_NUM_TLBCAMS Number of TLB CAM entries for Book-E chips. 64 for E500MC, 16 for other E500 SoCs.
+config BACKSIDE_L2_CACHE + bool + config SYS_PPC64 bool
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index c81e8cb580c8..40898a6d1f91 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -56,7 +56,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_SYS_CACHE_STASHING -#define CONFIG_BACKSIDE_L2_CACHE #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
#define CONFIG_ENABLE_36BIT_PHYS diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 57aad411abe2..dfb9e9120aea 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -119,7 +119,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_SYS_CACHE_STASHING -#define CONFIG_BACKSIDE_L2_CACHE #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 07ced21e40a4..6fbeebc1a661 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -96,7 +96,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_SYS_CACHE_STASHING -#define CONFIG_BACKSIDE_L2_CACHE #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index c654653fce7c..1c1c69dbd6a7 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -57,7 +57,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_SYS_CACHE_STASHING -#define CONFIG_BACKSIDE_L2_CACHE #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index fe773d503c07..29cc674e6d69 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -150,7 +150,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_SYS_CACHE_STASHING -#define CONFIG_BACKSIDE_L2_CACHE #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
#define CONFIG_ENABLE_36BIT_PHYS