Some Allwinner clock devices have parent clocks and reset gates themselves, which need to be activated for them to work.
Add some code to just assert all resets and enable all clocks given. This should enable the A80 MMC config clock, which requires both to be activated. The full CCU devices typically don't require resets, and have just fixed clocks as their parents. Since we treat both as optional and enabling fixed clocks is a NOP, this works for all cases, without the need to differentiate between those clock types.
Signed-off-by: Andre Przywara andre.przywara@arm.com --- drivers/clk/sunxi/clk_sunxi.c | 11 +++++++++++ 1 file changed, 11 insertions(+)
diff --git a/drivers/clk/sunxi/clk_sunxi.c b/drivers/clk/sunxi/clk_sunxi.c index 62ce2994e4..05c1297932 100644 --- a/drivers/clk/sunxi/clk_sunxi.c +++ b/drivers/clk/sunxi/clk_sunxi.c @@ -61,6 +61,9 @@ struct clk_ops sunxi_clk_ops = { int sunxi_clk_probe(struct udevice *dev) { struct ccu_priv *priv = dev_get_priv(dev); + struct clk_bulk clk_bulk; + struct reset_bulk rst_bulk; + int ret;
priv->base = dev_read_addr_ptr(dev); if (!priv->base) @@ -70,5 +73,13 @@ int sunxi_clk_probe(struct udevice *dev) if (!priv->desc) return -EINVAL;
+ ret = clk_get_bulk(dev, &clk_bulk); + if (!ret) + clk_enable_bulk(&clk_bulk); + + ret = reset_get_bulk(dev, &rst_bulk); + if (!ret) + reset_deassert_bulk(&rst_bulk); + return 0; }