This patch series add the Intel Queensbay platform support. The Queensbay platform includes an Atom E6xx processor (codename Tunnel Creek) and a Platform Controller Hub EG20T (codename Topcliff). The support depends on Intel Firmware Support Package (FSP) to initialize the processor and chipset including system memory. With this patch series, U-Boot boots to Linux kernel. Validated on an Intel Crown Bay board with kernel 3.17.
Changes in v4: - Rebase on u-boot-x86/master - Drop some patches which are already applied - Switch to use dtsi format microcode - Use __packed for structure defines - Fix some typos and print FSP full name in cmd_hob.c - Minor update to README.x86 per review comments from Pavel Machek
Changes in v3: - Update to use u-boot coding convention for fsp codes - Use jnz to jump to the car_init error code at the end of tnc_car.S file instead of being in the normal path flow - Add a TODO comment block to document the fsp_init() call - Change label xxx_stack to xxx_romstack - Add a comment block to explain the ROM stack - Add a commit message for the SPI support
Changes in v2: - Replace 0xcf9 with macro PORT_RESET from processor.h - Move FspInit call from start.S to car_init - Add UART0_BASE and UART1_BASE to ibmpc.h - Add a comment to explain we don't need check bit0 in GPIO base address register - Add setup_pch_gpios() in crownbay.c - Fix several typos in queensbay/Kconfig - Change FSP_FILE and CMC_FILE description to indicate the file is in the board directory - Add help for FSP_TEMP_RAM_ADDR - Add more help for CMC_FILE - New patch to use consistent name XXX_ADDR for binary blobs - Update ifdtool flags to indicate FSP and CMC files are in the board directory - Use consistent XXX_FILE name for binary blob file - Move PCH_LPC_DEV to arch/x86/include/asm/arch-queensbay/tnc.h - Check return value of x86_cpu_init_f() - Use ARRAY_SIZE(mmc_supported) instead of 2 - Check return value of add_sdhci() - New patch to rename coreboot-serial to x86-serial - Remove the 'make menuconfig' in the crownbay build instructions - Indicate all the binary blobs should be put in the board directory - Remove some casts in find_fsp_header() - Change HOB access macros to static inline routines
Bin Meng (14): x86: Integrate Tunnel Creek processor microcode x86: Add basic support to queensbay platform and crownbay board x86: ich6-gpio: Add Intel Tunnel Creek GPIO support x86: Enable the queensbay cpu directory build x86: Add queensbay and crownbay Kconfig files x86: Add crownbay defconfig and config.h x86: Use consistent name XXX_ADDR for binary blob flash address x86: Include FSP and CMC binary in the u-boot.rom build rules x86: crownbay: Add SPI flash support x86: crownbay: Enable Intel E1000 NIC support x86: crownbay: Add SDHCI support x86: Rename coreboot-serial to x86-serial x86: Add a README.x86 for U-Boot on x86 support x86: Clean up the FSP support codes
Simon Glass (1): x86: Convert microcode format to device-tree-only
Makefile | 16 +- arch/x86/Kconfig | 13 + arch/x86/cpu/Makefile | 1 + arch/x86/cpu/ivybridge/sdram.c | 2 +- arch/x86/cpu/queensbay/Kconfig | 79 +++++ arch/x86/cpu/queensbay/Makefile | 9 + arch/x86/cpu/queensbay/fsp_configs.c | 2 +- arch/x86/cpu/queensbay/fsp_support.c | 255 +++++++------- arch/x86/cpu/queensbay/tnc.c | 72 ++++ arch/x86/cpu/queensbay/tnc_car.S | 124 +++++++ arch/x86/cpu/queensbay/tnc_dram.c | 78 +++++ arch/x86/cpu/queensbay/tnc_pci.c | 61 ++++ arch/x86/cpu/queensbay/topcliff.c | 47 +++ arch/x86/dts/coreboot.dtsi | 2 +- arch/x86/dts/crownbay.dts | 7 + arch/x86/dts/microcode/m0220661105_cv.dtsi | 368 +++++++++++++++++++++ arch/x86/include/asm/arch-queensbay/fsp/fsp_api.h | 18 +- arch/x86/include/asm/arch-queensbay/fsp/fsp_ffs.h | 28 +- arch/x86/include/asm/arch-queensbay/fsp/fsp_fv.h | 14 +- arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h | 112 ++++--- .../asm/arch-queensbay/fsp/fsp_infoheader.h | 6 +- .../include/asm/arch-queensbay/fsp/fsp_platform.h | 8 +- .../include/asm/arch-queensbay/fsp/fsp_support.h | 63 ++-- .../x86/include/asm/arch-queensbay/fsp/fsp_types.h | 17 +- arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h | 8 +- arch/x86/include/asm/arch-queensbay/gpio.h | 13 + arch/x86/include/asm/arch-queensbay/tnc.h | 15 + arch/x86/include/asm/gpio.h | 4 +- arch/x86/include/asm/ibmpc.h | 3 + arch/x86/lib/cmd_hob.c | 22 +- board/coreboot/coreboot/coreboot.c | 2 +- board/google/chromebook_link/link.c | 2 +- board/intel/crownbay/Kconfig | 20 ++ board/intel/crownbay/MAINTAINERS | 6 + board/intel/crownbay/Makefile | 7 + board/intel/crownbay/crownbay.c | 32 ++ board/intel/crownbay/start.S | 9 + configs/crownbay_defconfig | 6 + doc/README.x86 | 126 +++++++ drivers/gpio/intel_ich6_gpio.c | 20 +- drivers/serial/Makefile | 2 +- drivers/serial/{serial_coreboot.c => serial_x86.c} | 12 +- include/configs/chromebook_link.h | 6 +- include/configs/coreboot.h | 2 +- include/configs/crownbay.h | 61 ++++ 45 files changed, 1470 insertions(+), 310 deletions(-) create mode 100644 arch/x86/cpu/queensbay/Kconfig create mode 100644 arch/x86/cpu/queensbay/Makefile create mode 100644 arch/x86/cpu/queensbay/tnc.c create mode 100644 arch/x86/cpu/queensbay/tnc_car.S create mode 100644 arch/x86/cpu/queensbay/tnc_dram.c create mode 100644 arch/x86/cpu/queensbay/tnc_pci.c create mode 100644 arch/x86/cpu/queensbay/topcliff.c create mode 100644 arch/x86/dts/microcode/m0220661105_cv.dtsi create mode 100644 arch/x86/include/asm/arch-queensbay/gpio.h create mode 100644 arch/x86/include/asm/arch-queensbay/tnc.h create mode 100644 board/intel/crownbay/Kconfig create mode 100644 board/intel/crownbay/MAINTAINERS create mode 100644 board/intel/crownbay/Makefile create mode 100644 board/intel/crownbay/crownbay.c create mode 100644 board/intel/crownbay/start.S create mode 100644 configs/crownbay_defconfig create mode 100644 doc/README.x86 rename drivers/serial/{serial_coreboot.c => serial_x86.c} (67%) create mode 100644 include/configs/crownbay.h