On Mon, 2008-10-13 at 14:14 -0500, Andy Fleming wrote:
On Wed, Oct 8, 2008 at 11:38 PM, Ed Swarthout Ed.Swarthout@freescale.com wrote:
Signed-off-by: Ed Swarthout Ed.Swarthout@freescale.com
Acked-by: Andy Fleming afleming@freescale.com
When agent/end-point, I thought the CPU must enable inbound PCI configuration cycles by poking the PBFR Register (offset 0x44) for PCI, or the Configuration Ready Register (offset 0x4b0 for PCIe) after configuring its own inbound BARs. I believe without these PCI config writes, the agent/end-point device will not be able to be enumerated by the PCI/PCIe host/root-comples as any config cycle to the device will be retried.
Would it make sense to add the unlocking of inbound PCI configuration cycles with this patch, or as a separate one? I have some basic code to do this, but wasn't sure of a clean way to determine if an interface is PCI or PCIe to determine how the interface should be unlocked (ie, the patch is a bit "dirty":).
Best, Peter