I have been trying to load u-bood into flash of brand new board but found some problems.
I have bdi2000, lite5200 and my own board ( itipower5200 ). I noticed that when i boot either board up. I can't read access flash with bdi2000 untill i have executed some amount of initial code that exists in lite5200 but of cource i can do this with my board because there is no code in flash yet.
It looks a like that cpu in lite5200 can read instructions from flash at beginning but bdi2000 displays only zeroes when i try to use md command. Both boards, lite5200 and itipower5200 displays zeroes and i have checked with osciloscope that least my board access flash and gives out 0xff
I have tried look the bdi2000 sample configuration files from denx but i have not yet find out what i have missed.
I also traced the motorola dBug from reset with lite5200 board to see what changed the behavior but least i did not get sensible result that should affect the behavior.
The bdi2000 has all the time read access to the internal memory space of mpc5200 and i can accress config redisters or internal ram at beginning but just reading external flash gives zeroes even i have initializeg cs controll registers.
So, simply, the problem is that what i should tell to bdi2000 that i can access flash in empty board ?
Kate
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; bdiGDB configuration file for 603ei (Zeppo) evaluation system ; ------------------------------------------------------------- ; ; DINK is used to setup the target. ; ; ; bdiGDB configuration file for the IceCube5200 evaluation board ; -------------------------------------------------------------- ; [INIT] ; init core register WREG MSR 0x00001002 ;MSR : ME,RI WM32 0x80000000 0x0000f000 ;MBAR : internal registers at 0xf0000000 WSPR 311 0xf0000000 ;MBAR : save internal register offset WSPR 279 0xf0000000 ;SPRG7: save internal memory offsetReg: 279 ; ; init memory controller WM32 0xf0000004 0x0000ff80 ;CS0 start = 0xff800000 WM32 0xf0000008 0x0000ffff ;CS0 stop = 0xffffffff WM32 0xf0000054 0x00010001 ;CSE: enable CS0, disable CSBOOT WM32 0xf0000300 0x00047800 ;BOOT ctrl
; init SDRAM CS for 16/16 Micron Type WM32 0xf0000034 0x00000019 ;SDRAM CS0, 64 MByte physical, can use all 64MByte WM32 0xf0000038 0x04000019 ;SDRAM CS1, 64 MByte physical, can use all 64MByte WM32 0xf0000204 0x10000000 ;SDRAM Set tap delay to 0x10 TSZ4 0x00000000 0x07FFFFFF ;SDRAM CS0,1, 128 MByte MMAP 0x00000000 0x07FFFFFF ;SDRAM CS0,1, 128 MByte
WM32 0x80000B00 0x80000000 ;GPIO Enable CS1
; init SDRAM controller for DDR 132MHz, CL=2.5 WM32 0x80000108 0x73722930 ;SDRAM Config 1 single read2readwrite delay cl=2.5, swt2rp =3 for DDR, read CAS = 7 (cl=2,5), act2rd= 2,66 -> 3, pre2act=2,66 -> 3, refresh to no read delay=0xA, Write latency for DDR =3 WM32 0x8000010C 0x47770000 ;SDRAM Config 2 WM32 0x80000104 0xF15F0F00 ;SDRAM Control: Mode register write enable mode reg=0, clk enable=1, DDR mode, auto refresh enabled, hi_addr set, use A10 for precharge, drive rule=1, refresh interval=d15, dqs_oe=b1111 WM32 0x80000104 0xF15F0F02 ;SDRAM Control: Mode register write enable, precharge all WM32 0x80000100 0x40090000 ;SDRAM Extended Mode DLL enabled, drive strength reduced, QFC disabled WM32 0x80000100 0x058D0000 ;SDRAM Mode, reset DLL burst 8, sequential, CAS latency 2.5 WM32 0x80000104 0xF15F0F02 ;SDRAM Control: precharge all WM32 0x80000104 0xF15F0F04 ;SDRAM Control: refresh WM32 0x80000100 0x018D0000 ;SDRAM Mode, normal DLL operation WM32 0x80000104 0x715F0F00 ;SDRAM Control, lock Mode register
; define maximal transfer size TSZ4 0xFF800000 0xFFFFFFFF ;ROM space TSZ4 0xF0000000 0xF0003FFF ;internal registers ; ; define the valid memory map MMAP 0x00000000 0x03FFFFFF ;Memory range for SDRAM MMAP 0xF0000000 0xF0003FFF ;Memory map for Internal Register MMAP 0xF0008000 0xF000BFFF ;Memory map for On-chip SRAM MMAP 0xFF800000 0xFFFFFFFF ;ROM space
[TARGET] CPUTYPE 5200 ;the CPU type JTAGCLOCK 0 ;use 16 MHz JTAG clock BREAK HARD ;SOFT or HARD, HARD uses PPC hardware breakpoint POWERUP 500 ;start delay after power-up detected in ms BOOTADDR 0xFFF00100 ;Boot High MMU XLAT DCACHE NOFLUSH
[FLASH] CHIPTYPE AM29F ;Flash type (AM29F | AM29BX8 | AM29BX16 | I28BX8 | I28BX16) CHIPSIZE 0x800000 ;The size of one flash chip in bytes BUSWIDTH 8 ;The width of the flash memory bus in bits (8 | 16 | 32) WORKSPACE 0xF0008000 ;workspace in internal SRAM FILE u-boot.bin FORMAT BIN 0xFF800000 ERASE 0xFF800000 ;erase sector 0 ERASE 0xFF810000 ;erase sector 1 ERASE 0xFF820000 ;erase sector 2