11 Feb
2015
11 Feb
'15
1:48 p.m.
Hi Ye.Li,
On 11/02/2015 04:14, Li Ye-B37916 wrote:
I feel you misunderstand the patch.
Thanks for clarifications.
On i.MX6sx, the QSPI2 and GPMI shares the same clock root of QSPI2. So you can see the register bits are named with "MXC_CCM_CS2CDR_QSPI2_xxx". Actually, not only the name, there is a little different in the CS2CDR register bits layout. The patch is used to fix the gap.
Also the the GPMI pins are multiplexed with QSPI2 pins, so either NAND or QSPI2 can work, there is no conflict.
Ok, understood - then it is fine with me.
Best regards, Stefano Babic
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