From: Aymen Sghaier aymen.sghaier@nxp.com
This patch enable CAAM support for i.MX8M platforms.
Signed-off-by: Aymen Sghaier aymen.sghaier@nxp.com Signed-off-by: Peng Fan peng.fan@nxp.com --- arch/arm/Kconfig | 3 +++ arch/arm/mach-imx/imx8m/Kconfig | 1 + drivers/crypto/fsl/jobdesc.c | 4 +++- include/fsl_sec.h | 13 +++++++++---- 4 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 70b9ad5b9f..76adf7fdb2 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -839,6 +839,9 @@ config ARCH_IMX8 config ARCH_IMX8M bool "NXP i.MX8M platform" select ARM64 + select SYS_FSL_HAS_SEC if IMX_HAB + select SYS_FSL_SEC_COMPAT_4 + select SYS_FSL_SEC_LE select DM select SUPPORT_SPL imply CMD_DM diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig index 59a45f7b01..e7e1315bac 100644 --- a/arch/arm/mach-imx/imx8m/Kconfig +++ b/arch/arm/mach-imx/imx8m/Kconfig @@ -2,6 +2,7 @@ if ARCH_IMX8M
config IMX8M bool + select HAS_CAAM select ROM_UNIFIED_SECTIONS
config IMX8MQ diff --git a/drivers/crypto/fsl/jobdesc.c b/drivers/crypto/fsl/jobdesc.c index 8c3db64527..0120a5c977 100644 --- a/drivers/crypto/fsl/jobdesc.c +++ b/drivers/crypto/fsl/jobdesc.c @@ -4,6 +4,7 @@ * Basic job descriptor construction * * Copyright 2014 Freescale Semiconductor, Inc. + * Copyright 2018 NXP * */
@@ -15,7 +16,8 @@ #include "rsa_caam.h" #include <asm/cache.h>
-#if defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP) +#if defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP) || \ + defined(CONFIG_IMX8M) /*! * Secure memory run command * diff --git a/include/fsl_sec.h b/include/fsl_sec.h index a98f6cb12a..c531a14477 100644 --- a/include/fsl_sec.h +++ b/include/fsl_sec.h @@ -3,6 +3,7 @@ * Common internal memory map for some Freescale SoCs * * Copyright 2014 Freescale Semiconductor, Inc. + * Copyright 2018 NXP */
#ifndef __FSL_SEC_H @@ -195,7 +196,8 @@ typedef struct ccsr_sec {
struct jr_regs { #if defined(CONFIG_SYS_FSL_SEC_LE) && \ - !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP)) + !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || \ + defined(CONFIG_MX7ULP) || defined(CONFIG_IMX8M)) u32 irba_l; u32 irba_h; #else @@ -209,7 +211,8 @@ struct jr_regs { u32 rsvd3; u32 irja; #if defined(CONFIG_SYS_FSL_SEC_LE) && \ - !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP)) + !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || \ + defined(CONFIG_MX7ULP) || defined(CONFIG_IMX8M)) u32 orba_l; u32 orba_h; #else @@ -242,7 +245,8 @@ struct jr_regs { */ struct sg_entry { #if defined(CONFIG_SYS_FSL_SEC_LE) && \ - !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP)) + !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || \ + defined(CONFIG_MX7ULP) || defined(CONFIG_IMX8M)) uint32_t addr_lo; /* Memory Address - lo */ uint32_t addr_hi; /* Memory Address of start of buffer - hi */ #else @@ -263,7 +267,8 @@ struct sg_entry {
#define BLOB_SIZE(x) ((x) + 32 + 16) /* Blob buffer size */
-#if defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP) +#if defined(CONFIG_MX6) || defined(CONFIG_MX7) || \ + defined(CONFIG_MX7ULP) || defined(CONFIG_IMX8M) /* Job Ring Base Address */ #define JR_BASE_ADDR(x) (CONFIG_SYS_FSL_SEC_ADDR + 0x1000 * (x + 1)) /* Secure Memory Offset varies accross versions */