Dear Poonam Aggrwal,
In message 1277185601-4939-1-git-send-email-poonam.aggrwal@freescale.com you wrote:
Signed-off-by: Dipen Dudhat dipen.dudhat@freescale.com Signed-off-by: Poonam Aggrwal poonam.aggrwal@freescale.com
board/freescale/p1_p2_rdb/p1_p2_rdb.c | 25 ++++++++----------------- 1 files changed, 8 insertions(+), 17 deletions(-)
diff --git a/board/freescale/p1_p2_rdb/p1_p2_rdb.c b/board/freescale/p1_p2_rdb/p1_p2_rdb.c index 31cdf9a..d870a3b 100644 --- a/board/freescale/p1_p2_rdb/p1_p2_rdb.c +++ b/board/freescale/p1_p2_rdb/p1_p2_rdb.c @@ -52,32 +52,23 @@ DECLARE_GLOBAL_DATA_PTR;
#define SYSCLK_MASK 0x00200000 #define BOARDREV_MASK 0x10100000 -#define BOARDREV_B 0x10100000 #define BOARDREV_C 0x00100000 +#define BOARDREV_D 0x00000000
#define SYSCLK_66 66666666 -#define SYSCLK_50 50000000 #define SYSCLK_100 100000000
Does that mean thea board rev. B and 50 MHz sys clk are not longer supported? Have these configurations been used in the past?Then we should rather keep them?
unsigned long get_board_sys_clk(ulong dummy) { volatile ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
Please use I/O accessors to read from peripherals!
Best regards,
Wolfgang Denk