Hi All,
Drop this patch.
-----Original Message----- From: Zhiqiang Hou [mailto:Zhiqiang.Hou@nxp.com] Sent: 2016年8月2日 19:03 To: u-boot@lists.denx.de; albert.u.boot@aribaud.net; york sun york.sun@nxp.com; wd@denx.de; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; Huan Wang alison.wang@nxp.com; Mingkai Hu mingkai.hu@nxp.com Cc: Yao Yuan yao.yuan@nxp.com; Qianyu Gong qianyu.gong@nxp.com; bmeng.cn@gmail.com; Shengzhou Liu shengzhou.liu@nxp.com; Zhiqiang Hou zhiqiang.hou@nxp.com Subject: [PATCH 4/5] fsl: csu: add an API to set R/W permission to PCIe
From: Hou Zhiqiang Zhiqiang.Hou@nxp.com
Signed-off-by: Hou Zhiqiang Zhiqiang.Hou@nxp.com
V2
- mv disable_pcie_ns_access() to set_pcie_ns_access().
.../include/asm/arch-fsl-layerscape/ns_access.h | 1 + board/freescale/common/ns_access.c | 28 ++++++++++++++++++++++ include/fsl_csu.h | 1 + 3 files changed, 30 insertions(+)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h index db76066..f46f1d8 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h @@ -6,6 +6,7 @@
#ifndef __FSL_NS_ACCESS_H_ #define __FSL_NS_ACCESS_H_ +#include <fsl_csu.h>
enum csu_cslx_ind { CSU_CSLX_PCIE2_IO = 0, diff --git a/board/freescale/common/ns_access.c b/board/freescale/common/ns_access.c index c3d7a5e..6d547fa 100644 --- a/board/freescale/common/ns_access.c +++ b/board/freescale/common/ns_access.c @@ -8,6 +8,7 @@ #include <asm/io.h> #include <fsl_csu.h> #include <asm/arch/ns_access.h> +#include <asm/arch/fsl_serdes.h>
void set_devices_ns_access(struct csu_ns_dev *ns_dev, u16 val) { @@ -40,3 +41,30 @@ void enable_layerscape_ns_access(void) { enable_devices_ns_access(ns_dev, ARRAY_SIZE(ns_dev)); }
+void set_pcie_ns_access(int pcie, u16 val) {
- switch (pcie) {
+#ifdef CONFIG_PCIE1
- case PCIE1:
set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE1], val);set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE1_IO], val);return;+#endif +#ifdef CONFIG_PCIE2
- case PCIE2:
set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE2], val);set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE2_IO], val);return;+#endif +#ifdef CONFIG_PCIE3
- case PCIE3:
set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE3], val);set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE3_IO], val);return;+#endif
- default:
debug("The PCIE%d doesn't exist!\n", pcie);return;- }
+} diff --git a/include/fsl_csu.h b/include/fsl_csu.h index 57a9985..42ca433 100644 --- a/include/fsl_csu.h +++ b/include/fsl_csu.h @@ -31,5 +31,6 @@ struct csu_ns_dev {
void enable_layerscape_ns_access(void); void set_devices_ns_access(struct csu_ns_dev *ns_dev, u16 val); +void set_pcie_ns_access(int pcie, u16 val);
#endif
2.1.0.27.g96db324
Thanks, Zhiqiang