8 May
2020
8 May
'20
2:04 p.m.
On 5/8/20 2:04 PM, Fabio Estevam wrote:
Hi Marek,
On Fri, May 8, 2020 at 8:57 AM Marek Vasut marex@denx.de wrote:
Maybe you also need entries like 126dcc925d ("ARM: imx: imx8mm: Add missing clock entries for FEC clock") for MX8MP ?
That only affects U-Boot proper, not SPL.
imx8mm clock driver also does not register Ethernet clocks in SPL:
/* clks not needed in SPL stage */ #ifndef CONFIG_SPL_BUILD clk_dm(IMX8MM_CLK_ENET_REF, imx8m_clk_composite("enet_ref", imx8mm_enet_ref_sels, base + 0xa980)); .....
Don't you need similar entry for WDT ?