The LS1046A processor is built on the QorIQ LS series architecture combining four ARM A72 processor cores with DPAA 1.0 support.
Change History:
[Patch v3 1/5] armv8: fsl-layerscape: Add A72 core detection v3: - Revise commit message. v2: - Add commit message.
[Patch v3 2/5] armv8: fsl-layerscape: Consolidate the LSCH2 common v3: - New patch.
[Patch v3 3/5] armv8: fsl_lsch2: Add SerDes 2 support v3: - Revise commit message. v2: - New patch.
[Patch v3 4/5] armv8: fsl_lsch2: Add LS1046A SoC support v3: - Fix the part in config.h as per the consolidation patch. v2: - Move serdes 2 support to a new patch. - Fix SVR and add LS1026A SVR. - Add SoC descriptions in README.soc. - Remove ls1046a errata.
[Patch v3 5/5] drivers: net/fm: Add Fman support for LS1046A v3: - Revise commit message. v2: - Add commit message.
Alison Wang (1): armv8: fsl-layerscape: Add A72 core detection
Gong Qianyu (2): armv8: fsl-layerscape: Consolidate the LSCH2 common defines armv8: fsl_lsch2: Add SerDes 2 support
Mingkai Hu (2): armv8: fsl_lsch2: Add LS1046A SoC support drivers: net/fm: Add Fman support for LS1046A
arch/arm/cpu/armv8/fsl-layerscape/Makefile | 4 + arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 3 +- arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc | 42 +++++++ .../cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c | 19 ++++ .../arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c | 25 ++++- arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c | 99 +++++++++++++++++ arch/arm/include/asm/arch-fsl-layerscape/config.h | 82 +++++++------- arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 2 + .../include/asm/arch-fsl-layerscape/fsl_serdes.h | 3 +- .../include/asm/arch-fsl-layerscape/immap_lsch2.h | 3 + .../include/asm/arch-fsl-layerscape/immap_lsch3.h | 1 + arch/arm/include/asm/arch-fsl-layerscape/soc.h | 2 + drivers/net/fm/Makefile | 1 + drivers/net/fm/ls1046.c | 123 +++++++++++++++++++++ 14 files changed, 368 insertions(+), 41 deletions(-) create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c create mode 100644 drivers/net/fm/ls1046.c