Hello,
I have a couple of questions about RAM microcode patches for MPC8xx CPUs:
1. What is EXACTLY the patch in cpu/mpc8xx/upatch.c. Specifically, which CPU(s) it is applicable to? I looked at a couple of recent patches available at Freescale website and none of them resembles the stuff in upatch.c 2. My impression is that different CPUs need different patches. I can at least see patches for MPC823, MPC850, MPC860 and MPC862. That means that we probably need to check not only CFG_*_UCODE_PATCH, but also the corresponding CONFIG_ variable for the CPU. I am about to add the appropriate patch for my board, and thus I have to #ifdef the older one and I'd better do it right. 3. I noticed that there is special handling for SPI and I2C, but how about SMC? I use SCC3 in the ethernet mode and SMC1 as a console and definitely have a problem. (A simple change to scc.c seems to have fixed the problem for now, but I'd like to have a cleaner solution). 4. Finally, what is the assumption about Linux. Is it supposed to reset the CP and reload the patches?
Thanks, Vladimir