a64 has shared PHY#0(for OTG and USB-OTG-HCI) which start at 0x01C19000 which different than other allwinner SOC, so update the same for sunxi_usb_phy[0] base.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/mach-sunxi/usb_phy.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-sunxi/usb_phy.c b/arch/arm/mach-sunxi/usb_phy.c index 4bc47a1..cc66446 100644 --- a/arch/arm/mach-sunxi/usb_phy.c +++ b/arch/arm/mach-sunxi/usb_phy.c @@ -63,7 +63,11 @@ static struct sunxi_usb_phy { { .usb_rst_mask = CCM_USB_CTRL_PHY0_RST | CCM_USB_CTRL_PHY0_CLK, .id = 0, +#ifdef CONFIG_MACH_SUN50I + .base = SUNXI_USBPHY_BASE, +#else .base = SUNXI_USB0_BASE, +#endif }, { .usb_rst_mask = CCM_USB_CTRL_PHY1_RST | CCM_USB_CTRL_PHY1_CLK,