Upstream commit f7025a43a9da26fb79684c6b75ddfe6b1b5986bf
The MTD subsystem has its own small museum of ancient NANDs in a form of the CONFIG_MTD_NAND_MUSEUM_IDS configuration option. The museum contains stone age NANDs with 256 bytes pages, as well as iron age NANDs with 512 bytes per page and up to 8MiB page size.
It is with great sorrow that I inform you that the museum is being decommissioned. The MTD subsystem is out of budget for Kconfig options and already has too many of them, and there is a general kernel trend to simplify the configuration menu.
We remove the stone age exhibits along with closing the museum, but some of the iron age ones are transferred to the regular NAND depot. Namely, only those which have unique device IDs are transferred, and the ones which have conflicting device IDs are removed.
Signed-off-by: Artem Bityutskiy artem.bityutskiy@linux.intel.com Signed-off-by: David Woodhouse David.Woodhouse@intel.com Signed-off-by: Michael Trimarchi michael@amarulasolutions.com --- drivers/mtd/nand/raw/nand_ids.c | 10 ---------- 1 file changed, 10 deletions(-)
diff --git a/drivers/mtd/nand/raw/nand_ids.c b/drivers/mtd/nand/raw/nand_ids.c index 7602dd30f1..4dece1b206 100644 --- a/drivers/mtd/nand/raw/nand_ids.c +++ b/drivers/mtd/nand/raw/nand_ids.c @@ -24,16 +24,6 @@ * extended chip ID. */ struct nand_flash_dev nand_flash_ids[] = { -#ifdef CONFIG_MTD_NAND_MUSEUM_IDS - LEGACY_ID_NAND("NAND 1MiB 5V 8-bit", 0x6e, 1, SZ_4K, SP_OPTIONS), - LEGACY_ID_NAND("NAND 2MiB 5V 8-bit", 0x64, 2, SZ_4K, SP_OPTIONS), - LEGACY_ID_NAND("NAND 1MiB 3,3V 8-bit", 0xe8, 1, SZ_4K, SP_OPTIONS), - LEGACY_ID_NAND("NAND 1MiB 3,3V 8-bit", 0xec, 1, SZ_4K, SP_OPTIONS), - LEGACY_ID_NAND("NAND 2MiB 3,3V 8-bit", 0xea, 2, SZ_4K, SP_OPTIONS), - LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xd5, 4, SZ_8K, SP_OPTIONS), - - LEGACY_ID_NAND("NAND 8MiB 3,3V 8-bit", 0xe6, 8, SZ_8K, SP_OPTIONS), -#endif /* * Some incompatible NAND chips share device ID's and so must be * listed by full ID. We list them first so that we can easily identify