The CONFIG_OMAP1510 defines in cmd_nand.c aren't really CPU specific, they are NAND specific (for NAND parts which have their WP pins hooked up). It happens that our design hooked them up to a BIU signal which matched up to its functionality.
Woodhouse had indicated to me that the general NAND MTD code would be changing to handle the selective control of the WP signal also as other devices are showing up with it connected. I think he said the parts he had previously worked with just globally disabled the wp function.
Those defines should probably be renamed and inlined like the other control pin def's.
I still need to put a patch in as write_oob won't work from the command line interface if the WP pin is enabled.
Regards,
Richard W.
-----Original Message----- From: "David Müller (ELSOFT AG)" [mailto:d.mueller@elsoft.ch] Sent: Friday, September 19, 2003 5:16 AM To: Gianluca Cc: u-boot-users@lists.sourceforge.net Subject: Re: [U-Boot-Users] Re: Patch s3c2410 nand-boot.
Hello
Gianluca wrote:
I have changed NAND code only to remove warning beacuse I don't use some variable an then I rewrite "unsigned long nandptr = nand->IO_ADDR;"
in
"unsigned long nandptr; nandptr = nand->IO_ADDR;".
Wolfgang and I have agreed, that direct hardware accesses and board specific implementation details should be removed from "cmd_nand.c", but should be implemented in a cpu and / or board specific low level NAND flash driver instead.
Please take a look at the NAND part of the Linux MTD drivers to get an idea how it should work.