From: Alessandro Rubini rubini@unipv.it
Signed-off-by: Alessandro Rubini rubini@unipv.it Acked-by: Andrea Gallo andrea.gallo@stericsson.com --- drivers/video/Makefile | 1 + drivers/video/amba.c | 86 ++++++++++++++++++++++++++++++++++++++++++++++++ include/amba_clcd.h | 85 +++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 172 insertions(+), 0 deletions(-) create mode 100644 drivers/video/amba.c create mode 100644 include/amba_clcd.h
diff --git a/drivers/video/Makefile b/drivers/video/Makefile index bb6b5a0..a5e339a 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -29,6 +29,7 @@ COBJS-$(CONFIG_ATI_RADEON_FB) += ati_radeon_fb.o COBJS-$(CONFIG_ATMEL_LCD) += atmel_lcdfb.o COBJS-$(CONFIG_CFB_CONSOLE) += cfb_console.o COBJS-$(CONFIG_S6E63D6) += s6e63d6.o +COBJS-$(CONFIG_VIDEO_AMBA) += amba.o COBJS-$(CONFIG_VIDEO_CT69000) += ct69000.o COBJS-$(CONFIG_VIDEO_MB862xx) += mb862xx.o COBJS-$(CONFIG_VIDEO_MX3) += mx3fb.o diff --git a/drivers/video/amba.c b/drivers/video/amba.c new file mode 100644 index 0000000..ebb9aca --- /dev/null +++ b/drivers/video/amba.c @@ -0,0 +1,86 @@ +/* + * Driver for AMBA PrimeCell CLCD + * + * Copyright (C) 2009 Alessandro Rubini + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <lcd.h> +#include <amba_clcd.h> + +/* These variables are required by lcd.c -- although it sets them by itself */ +int lcd_line_length; +int lcd_color_fg; +int lcd_color_bg; +void *lcd_base; +void *lcd_console_address; +short console_col; +short console_row; + +/* + * To use this driver you need to provide the following in board files: + * a panel_info definition + * an lcd_enable function (can't define a weak default with current code) + */ + +/* There is nothing to do with color registers, we use true color */ +void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue) +{ + printf("%s:%s - %i %i %i %i\n", __FILE__, __func__, + regno, red, green, blue); + return; +} + +/* Low level initialization of the logic cell: depends on panel_info */ +void lcd_ctrl_init(void *lcdbase) +{ + struct clcd_regs *regval; + void *regs; + u32 cntl; + + printf("%s:%s\n", __FILE__, __func__); + + regval = panel_info.priv; + regs = (void *)NOMADIK_CLCDC_BASE; + cntl = regval->cntl & ~CNTL_LCDEN; + printf("%s:%s -- t0 %x t1 %x \n", __FILE__, __func__, + regval->tim0, regval->tim1); + + /* Lazily, just copy the registers over: first control with no ena */ + writel(cntl, regs + CLCD_CNTL); + writel(regval->tim0, regs + CLCD_TIM0); + writel(regval->tim1, regs + CLCD_TIM1); + writel(regval->tim2, regs + CLCD_TIM2); + writel(regval->tim3, regs + CLCD_TIM3); + writel((u32)lcdbase, regs + CLCD_UBAS); + /* finally, enable */ + writel(cntl | CNTL_LCDEN, regs + CLCD_CNTL); +} + +/* This is trivial, and copied from atmel_lcdfb.c */ +ulong calc_fbsize(void) +{ + printf("%s:%s\n", __FILE__, __func__); + return ((panel_info.vl_col * panel_info.vl_row * + NBITS(panel_info.vl_bpix)) / 8) + PAGE_SIZE; + +} diff --git a/include/amba_clcd.h b/include/amba_clcd.h new file mode 100644 index 0000000..f72062b --- /dev/null +++ b/include/amba_clcd.h @@ -0,0 +1,85 @@ +/* + * Register definitions for the AMBA CLCD logic cell. + * + * derived from David A Rusling: + * linux/include/asm-arm/hardware/amba_clcd.h -- Integrator LCD panel. + * + * Copyright (C) 2001 ARM Limited + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +/* + * CLCD Controller Internal Register addresses + */ +#define CLCD_TIM0 0x00000000 +#define CLCD_TIM1 0x00000004 +#define CLCD_TIM2 0x00000008 +#define CLCD_TIM3 0x0000000c +#define CLCD_UBAS 0x00000010 +#define CLCD_LBAS 0x00000014 + +#if !defined(CONFIG_ARCH_VERSATILE) && !defined(CONFIG_ARCH_REALVIEW) +#define CLCD_IENB 0x00000018 +#define CLCD_CNTL 0x0000001c +#else +/* + * Someone rearranged these two registers on the Versatile + * platform... + */ +#define CLCD_IENB 0x0000001c +#define CLCD_CNTL 0x00000018 +#endif + +#define CLCD_STAT 0x00000020 +#define CLCD_INTR 0x00000024 +#define CLCD_UCUR 0x00000028 +#define CLCD_LCUR 0x0000002C +#define CLCD_PALL 0x00000200 +#define CLCD_PALETTE 0x00000200 + +#define TIM2_CLKSEL (1 << 5) +#define TIM2_IVS (1 << 11) +#define TIM2_IHS (1 << 12) +#define TIM2_IPC (1 << 13) +#define TIM2_IOE (1 << 14) +#define TIM2_BCD (1 << 26) + +#define CNTL_LCDEN (1 << 0) +#define CNTL_LCDBPP1 (0 << 1) +#define CNTL_LCDBPP2 (1 << 1) +#define CNTL_LCDBPP4 (2 << 1) +#define CNTL_LCDBPP8 (3 << 1) +#define CNTL_LCDBPP16 (4 << 1) +#define CNTL_LCDBPP16_565 (6 << 1) +#define CNTL_LCDBPP24 (5 << 1) +#define CNTL_LCDBW (1 << 4) +#define CNTL_LCDTFT (1 << 5) +#define CNTL_LCDMONO8 (1 << 6) +#define CNTL_LCDDUAL (1 << 7) +#define CNTL_BGR (1 << 8) +#define CNTL_BEBO (1 << 9) +#define CNTL_BEPO (1 << 10) +#define CNTL_LCDPWR (1 << 11) +#define CNTL_LCDVCOMP(x) ((x) << 12) +#define CNTL_LDMAFIFOTIME (1 << 15) +#define CNTL_WATERMARK (1 << 16) + +/* raw information */ +struct clcd_regs { + u32 tim0; + u32 tim1; + u32 tim2; + u32 tim3; + u32 cntl; + unsigned long pixclock; +}; + +/* split up information -- yet to be used */ +struct clcd_params { + int left_margin, right_margin, upper_margin, lower_margin; + int hsync_len, vsync_len; + int sync, vmode; +};