Re: [PATCH 3/6] x86: Avoid timer-clock overflow

When the clock speed is above about 4GHz, e.g. on modern PC hardware, the timer overflows, resulting in a much lower frequency than expected. Deal with this by capping the clock speed.

It would be possible to move to a 64-bit value for the clock, but that is a pain to deal with. A better approach might be to express the clock in MHz but that is left for later consideration.

Signed-off-by: Simon Glass sjg@chromium.org ---

drivers/timer/tsc_timer.c | 1 + 1 file changed, 1 insertion(+)

Applied to u-boot-dm, thanks!