Hi Pavel,
On Fri, 2013-06-28 at 13:40 +0200, ZY - pavel wrote:
Hi!
socfpga: Adding System Manager driver which will configure the pin mux for real hardware Cyclone V development kit (not Virtual Platform)
Signed-off-by: Chin Liang See clsee@altera.com
diff --git a/arch/arm/cpu/armv7/socfpga/system_manager.c b/arch/arm/cpu/armv7/socfpga/system_manager.c new file mode 100644 index 0000000..f2707d8b --- /dev/null +++ b/arch/arm/cpu/armv7/socfpga/system_manager.c @@ -0,0 +1,40 @@ +/*
- Copyright Altera Corporation (C) 2013. All rights reserved
- This program is free software; you can redistribute it and/or
+modify it
Word wrapped.
Will fix with new email client
+/*
- Configure all the pin mux
- */
"the pin muxes" ?
Noted
+void sysmgr_pinmux_init(void) +{
unsigned long offset = CONFIG_SYSMGR_PINMUXGRP_OFFSET;const unsigned long *pval = sys_mgr_init_table;unsigned long i;for (i = 0;i < ((sizeof(sys_mgr_init_table)) / sizeof(unsigned long));There's nice ARRAY_SIZE() macro that can be used.
Noted
--- /dev/null +++ b/board/altera/socfpga_cyclone5/pinmux_config.c @@ -0,0 +1,213 @@
+#include "pinmux_config.h"
+/* pin mux configuration data */ +unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM] = {
0, /* EMACIO0 - Unused */2, /* EMACIO1 - USB */2, /* EMACIO2 - USB */2, /* EMACIO3 - USB */Is this table auto-generated somehow?
If so, comment about that would be nice.
If not, perhaps we could put more than one entry on line, to make it shorter?
Yup, its auto generated by tools. I will put comment to note this.
Thanks
Chin Liang
Thanks, Pavel