1 Apr
2015
1 Apr
'15
5:15 a.m.
On 26 March 2015 at 09:29, Simon Glass sjg@chromium.org wrote:
The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also.
Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped.
Signed-off-by: Simon Glass sjg@chromium.org
Changes in v2: None
arch/x86/cpu/ivybridge/cpu.c | 2 +- arch/x86/cpu/ivybridge/lpc.c | 13 +++++++- arch/x86/dts/chromebook_link.dts | 70 ++++++++++++++++++++++------------------ include/fdtdec.h | 1 + lib/fdtdec.c | 3 +- 5 files changed, 55 insertions(+), 34 deletions(-)
Applied to u-boot-dm/next