Subodh Nijsure writes:
Subodh> To debug this we wrote a routine to enable the RISC timer on Subodh> the CPM.
Subodh> We verify it that this timer is actually getting counted Subodh> down. This tells us that CPM is running.
Subodh> However in the file cpm/mpc8260/serial_scc.c as soon as Subodh> following line of code is executed
Subodh> tbdf-> cdb_sc |= BD_SC_READY;
Subodh> the RISC timers stops counting.
This in many cases points to SDMA bus error. Please check SDSR.
Subodh> So somehow it appears that the transmit buffer descriptor Subodh> that we are setting up for CPM to transmit data on SCC1 Subodh> appears to be "invalid"?
Probably not the BD but the data to be sent. Check the data pointer in the BD.
Subodh> The CPM-RAM address that can be used is defined in Subodh> include/asm-ppc/cpm_8260.h (definition of CPM_DATAONLY_BASE) Subodh> so we moved its location around to 0x3000, also changing Subodh> CPM_DATA_ONLY_SIZE also, but it had no effect.
I've got 8250-based board on my desk and it works OK with default U-Boot values. I don't think there is any difference in DPRAM map between 8260 and 8250.
Subodh> I am sending question to folks at Motorola but if someone Subodh> has encountered this before, please do let me know what Subodh> could be the possible reason, that CPM gets stuck momemnt we Subodh> mark tx descriptor is valid. Since the CPM at this point Subodh> processing the RISC timer, I think CPM is getting the Subodh> clocked correctly...