Re: [U-Boot] [PATCH] mx6: Add initial SPL support for HummingBoard-i2eX

Hi Fabio,

On 15/04/2015 22:57, Fabio Estevam wrote:

From: Fabio Estevam fabio.estevam@freescale.com

Add the initial SPL support for HummingBoard-i2eX, which is based on a MX6 Dual.

For more information about HummingBoard, please check: http://www.solid-run.com/products/hummingboard/

Based on the work from Jon Nettleton and Rabeeh Khoury.

Signed-off-by: Fabio Estevam fabio.estevam@freescale.com

Currently only HummingBoard-i2eX is supported.

After this initial patch is accepted, then we can add the other Hummingboard and Cubox-i variants as well.

arch/arm/Kconfig | 6 + board/solidrun/mx6cuboxi/Kconfig | 15 ++ board/solidrun/mx6cuboxi/MAINTAINERS | 6 + board/solidrun/mx6cuboxi/Makefile | 9 + board/solidrun/mx6cuboxi/README | 23 +++ board/solidrun/mx6cuboxi/mx6cuboxi.c | 336 +++++++++++++++++++++++++++++++++++ configs/mx6cuboxi_spl_defconfig | 6 + include/configs/mx6cuboxi.h | 257 +++++++++++++++++++++++++++ 8 files changed, 658 insertions(+) create mode 100644 board/solidrun/mx6cuboxi/Kconfig create mode 100644 board/solidrun/mx6cuboxi/MAINTAINERS create mode 100644 board/solidrun/mx6cuboxi/Makefile create mode 100644 board/solidrun/mx6cuboxi/README create mode 100644 board/solidrun/mx6cuboxi/mx6cuboxi.c create mode 100644 configs/mx6cuboxi_spl_defconfig create mode 100644 include/configs/mx6cuboxi.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 7ed0e20..7c383cb 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -523,6 +523,11 @@ config TARGET_MX6SABRESD select CPU_V7 select SUPPORT_SPL

+config TARGET_MX6CUBOXI

• bool "Support Solid-run mx6 boards"
• select CPU_V7
• select SUPPORT_SPL

config TARGET_MX6SLEVK bool "Support mx6slevk" select CPU_V7 @@ -856,6 +861,7 @@ source "board/siemens/draco/Kconfig" source "board/siemens/pxm2/Kconfig" source "board/siemens/rut/Kconfig" source "board/silica/pengwyn/Kconfig" +source "board/solidrun/mx6cuboxi/Kconfig" source "board/solidrun/hummingboard/Kconfig" source "board/spear/spear300/Kconfig" source "board/spear/spear310/Kconfig" diff --git a/board/solidrun/mx6cuboxi/Kconfig b/board/solidrun/mx6cuboxi/Kconfig new file mode 100644 index 0000000..31d88b2 --- /dev/null +++ b/board/solidrun/mx6cuboxi/Kconfig @@ -0,0 +1,15 @@ +if TARGET_MX6CUBOXI

+config SYS_BOARD

• default "mx6cuboxi"

+config SYS_VENDOR

• default "solidrun"

+config SYS_SOC

• default "mx6"

+config SYS_CONFIG_NAME

• default "mx6cuboxi"

+endif diff --git a/board/solidrun/mx6cuboxi/MAINTAINERS b/board/solidrun/mx6cuboxi/MAINTAINERS new file mode 100644 index 0000000..3d468ed --- /dev/null +++ b/board/solidrun/mx6cuboxi/MAINTAINERS @@ -0,0 +1,6 @@ +MX6CUBOXI BOARD +M: Fabio Estevam fabio.estevam@freescale.com +S: Maintained +F: board/solidrun/mx6cuboxi/ +F: include/configs/mx6cuboxi.h +F: configs/mx6cuboxi_spl_defconfig diff --git a/board/solidrun/mx6cuboxi/Makefile b/board/solidrun/mx6cuboxi/Makefile new file mode 100644 index 0000000..df425ac --- /dev/null +++ b/board/solidrun/mx6cuboxi/Makefile @@ -0,0 +1,9 @@ +# +# Copyright (C) 2007, Guennadi Liakhovetski lg@denx.de +# +# (C) Copyright 2011 Freescale Semiconductor, Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +#

+obj-y := mx6cuboxi.o diff --git a/board/solidrun/mx6cuboxi/README b/board/solidrun/mx6cuboxi/README new file mode 100644 index 0000000..29bff2b --- /dev/null +++ b/board/solidrun/mx6cuboxi/README @@ -0,0 +1,23 @@ +How to use U-boot on Solid-run mx6 hummingboard +-----------------------------------------------

+- Build U-boot for hummingboard:

+$ make mrproper +$ make mx6cuboxi_spl_defconfig +$ make

+This will generate the SPL image called SPL and the u-boot.img.

+- Flash the SPL image into the SD card:

+sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync

+- Flash the u-boot.img image into the SD card:

+sudo dd if=u-boot.img of=/dev/mmcblk0 bs=1k seek=69; sync

+- Insert the SD card in the hummingboard, power it up and U-boot messages +should come up.

diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c b/board/solidrun/mx6cuboxi/mx6cuboxi.c new file mode 100644 index 0000000..4cbd832 --- /dev/null +++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c @@ -0,0 +1,336 @@ +/*

• • Copyright (C) 2015 Freescale Semiconductor, Inc.
• • Author: Fabio Estevam fabio.estevam@freescale.com
• • Copyright (C) 2013 Jon Nettleton jon.nettleton@gmail.com
• • Based on SPL code from Solidrun tree, which is:
• • Author: Tungyi Lin tungyilin1127@gmail.com
• • Derived from EDM_CF_IMX6 code by TechNexion,Inc
• • Ported to SolidRun microSOM by Rabeeh Khoury rabeeh@solid-run.com
• • SPDX-License-Identifier: GPL-2.0+
• */

+#include <asm/arch/clock.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/iomux.h> +#include <asm/arch/mx6-pins.h> +#include <asm/errno.h> +#include <asm/gpio.h> +#include <asm/imx-common/iomux-v3.h> +#include <mmc.h> +#include <fsl_esdhc.h> +#include <miiphy.h> +#include <netdev.h> +#include <asm/arch/crm_regs.h> +#include <asm/io.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/mx6-ddr.h>

+DECLARE_GLOBAL_DATA_PTR;

+#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \

• PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
• PAD_CTL_SRE_FAST | PAD_CTL_HYS)

+#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \

• PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
• PAD_CTL_SRE_FAST | PAD_CTL_HYS)

+#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \

• PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)

+#define ENET_PAD_CTRL_PD (PAD_CTL_PUS_100K_DOWN | \

• PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)

+#define ENET_PAD_CTRL_CLK ((PAD_CTL_PUS_100K_UP & ~PAD_CTL_PKE) | \

• PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)

+#define ETH_PHY_RESET IMX_GPIO_NR(4, 15)

+int dram_init(void) +{

• gd->ram_size = imx_ddr_size();
• return 0;

+}

+static iomux_v3_cfg_t const uart1_pads[] = {

• MX6_PAD_CSI0_DAT10__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
• MX6_PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),

+};

+static iomux_v3_cfg_t const usdhc2_pads[] = {

• MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
• MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
• MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
• MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
• MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
• MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),

+};

+static void setup_iomux_uart(void) +{

• imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));

+}

+struct fsl_esdhc_cfg usdhc_cfg[1] = {

• {USDHC2_BASE_ADDR},

+};

+int board_mmc_getcd(struct mmc *mmc) +{

• return 1; /* uSDHC2 is always present */

+}

+int board_mmc_init(bd_t *bis) +{

• imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
• usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR;
• usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
• gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk;
• return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);

+}

+#ifdef CONFIG_FEC_MXC +static iomux_v3_cfg_t const enet_pads[] = {

• MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
• MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
• /* AR8035 reset */
• MX6_PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD),
• /* AR8035 interrupt */
• MX6_PAD_DI0_PIN2__GPIO4_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL),
• /* GPIO16 -> AR8035 25MHz */
• MX6_PAD_GPIO_16__ENET_REF_CLK | MUX_PAD_CTRL(NO_PAD_CTRL),
• MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(NO_PAD_CTRL),
• MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
• MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
• MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
• MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
• MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
• /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
• MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL_CLK),
• MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
• MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD),
• MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD),
• MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
• MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
• MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL_PD),

+};

+static void setup_iomux_enet(void) +{

• imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads));
• gpio_direction_output(ETH_PHY_RESET, 0);
• mdelay(2);
• gpio_set_value(ETH_PHY_RESET, 1);

+}

+int board_phy_config(struct phy_device *phydev) +{

• if (phydev->drv->config)

• phydev->drv->config(phydev);
  

• return 0;

+}

+int board_eth_init(bd_t *bis) +{

• struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
• int ret = enable_fec_anatop_clock(ENET_25MHZ);
• if (ret)

• return ret;
  

• /* set gpr1[ENET_CLK_SEL] */
• setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_ENET_CLK_SEL_MASK);
• setup_iomux_enet();
• return cpu_eth_init(bis);

+} +#endif

+int board_early_init_f(void) +{

• setup_iomux_uart();
• return 0;

+}

+int board_init(void) +{

• /* address of boot parameters */
• gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
• return 0;

+}

+int checkboard(void) +{

• puts("Board: MX6 Hummingboard\n");
• return 0;

+}

+#ifdef CONFIG_SPL_BUILD +#include <spl.h> +#include <libfdt.h>

+const struct mx6dq_iomux_ddr_regs mx6_ddr_ioregs = {

• .dram_sdclk_0 = 0x00020030,
• .dram_sdclk_1 = 0x00020030,
• .dram_cas = 0x00020030,
• .dram_ras = 0x00020030,
• .dram_reset = 0x00020030,
• .dram_sdcke0 = 0x00003000,
• .dram_sdcke1 = 0x00003000,
• .dram_sdba2 = 0x00000000,
• .dram_sdodt0 = 0x00003030,
• .dram_sdodt1 = 0x00003030,
• .dram_sdqs0 = 0x00000030,
• .dram_sdqs1 = 0x00000030,
• .dram_sdqs2 = 0x00000030,
• .dram_sdqs3 = 0x00000030,
• .dram_sdqs4 = 0x00000030,
• .dram_sdqs5 = 0x00000030,
• .dram_sdqs6 = 0x00000030,
• .dram_sdqs7 = 0x00000030,
• .dram_dqm0 = 0x00020030,
• .dram_dqm1 = 0x00020030,
• .dram_dqm2 = 0x00020030,
• .dram_dqm3 = 0x00020030,
• .dram_dqm4 = 0x00020030,
• .dram_dqm5 = 0x00020030,
• .dram_dqm6 = 0x00020030,
• .dram_dqm7 = 0x00020030,

+};

+const struct mx6dq_iomux_grp_regs mx6_grp_ioregs = {

• .grp_ddr_type = 0x000C0000,
• .grp_ddrmode_ctl = 0x00020000,
• .grp_ddrpke = 0x00000000,
• .grp_addds = 0x00000030,
• .grp_ctlds = 0x00000030,
• .grp_ddrmode = 0x00020000,
• .grp_b0ds = 0x00000030,
• .grp_b1ds = 0x00000030,
• .grp_b2ds = 0x00000030,
• .grp_b3ds = 0x00000030,
• .grp_b4ds = 0x00000030,
• .grp_b5ds = 0x00000030,
• .grp_b6ds = 0x00000030,
• .grp_b7ds = 0x00000030,

+};

+const struct mx6_mmdc_calibration mx6_mmcd_calib = {

• .p0_mpwldectrl0 = 0x00000000,
• .p0_mpwldectrl1 = 0x00000000,
• .p1_mpwldectrl0 = 0x00000000,
• .p1_mpwldectrl1 = 0x00000000,
• .p0_mpdgctrl0 = 0x0314031c,
• .p0_mpdgctrl1 = 0x023e0304,
• .p1_mpdgctrl0 = 0x03240330,
• .p1_mpdgctrl1 = 0x03180260,
• .p0_mprddlctl = 0x3630323c,
• .p1_mprddlctl = 0x3436283a,
• .p0_mpwrdlctl = 0x36344038,
• .p1_mpwrdlctl = 0x422a423c,

+};

+static struct mx6_ddr3_cfg mem_ddr = {

• .mem_speed = 1600,
• .density = 4,
• .width = 64,
• .banks = 8,
• .rowaddr = 14,
• .coladdr = 10,
• .pagesz = 2,
• .trcd = 1375,
• .trcmin = 4875,
• .trasmin = 3500,

+};

+static void ccgr_init(void) +{

• struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
• writel(0x00C03F3F, &ccm->CCGR0);
• writel(0x0030FC03, &ccm->CCGR1);
• writel(0x0FFFC000, &ccm->CCGR2);
• writel(0x3FF00000, &ccm->CCGR3);
• writel(0x00FFF300, &ccm->CCGR4);
• writel(0x0F0000C3, &ccm->CCGR5);
• writel(0x000003FF, &ccm->CCGR6);

+}

+static void gpr_init(void) +{

• struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
• /* enable AXI cache for VDOA/VPU/IPU */
• writel(0xF00000CF, &iomux->gpr[4]);
• /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
• writel(0x007F007F, &iomux->gpr[6]);
• writel(0x007F007F, &iomux->gpr[7]);

+}

+/*

• • This section requires the differentiation between Solidrun mx6 boards, but
• • for now, it will configure only for the mx6dual hummingboard version.
• */

+static void spl_dram_init(void) +{

• struct mx6_ddr_sysinfo sysinfo = {

• /* width of data bus:0=16,1=32,2=64 */
  

• .dsize = mem_ddr.width/32,
  

• /* config for full 4GB range so that get_mem_size() works */
  

• .cs_density = 32, /* 32Gb per CS */
  

• /* single chip select */
  

• .ncs = 1,
  

• .cs1_mirror = 0,
  

• .rtt_wr = 1 /*DDR3_RTT_60_OHM*/,	/* RTT_Wr = RZQ/4 */
  

• .rtt_nom = 1 /*DDR3_RTT_60_OHM*/,	/* RTT_Nom = RZQ/4 */
  

• .walat = 1,	/* Write additional latency */
  

• .ralat = 5,	/* Read additional latency */
  

• .mif3_mode = 3,	/* Command prediction working mode */
  

• .bi_on = 1,	/* Bank interleaving enabled */
  

• .sde_to_rst = 0x10,	/* 14 cycles, 200us (JEDEC default) */
  

• .rst_to_cke = 0x23,	/* 33 cycles, 500us (JEDEC default) */
  

• };
• mx6dq_dram_iocfg(mem_ddr.width, &mx6_ddr_ioregs, &mx6_grp_ioregs);
• mx6_dram_cfg(&sysinfo, &mx6_mmcd_calib, &mem_ddr);

+}

+void board_init_f(ulong dummy) +{

• /* setup AIPS and disable watchdog */
• arch_cpu_init();
• ccgr_init();
• gpr_init();
• /* iomux and setup of i2c */
• board_early_init_f();
• /* setup GP timer */
• timer_init();
• /* UART clocks enabled and gd valid - init serial console */
• preloader_console_init();
• /* DDR initialization */
• spl_dram_init();
• /* Clear the BSS. */
• memset(__bss_start, 0, __bss_end - __bss_start);
• /* load/boot image from boot device */
• board_init_r(NULL, 0);

+}

+void reset_cpu(ulong addr) +{ +} +#endif diff --git a/configs/mx6cuboxi_spl_defconfig b/configs/mx6cuboxi_spl_defconfig new file mode 100644 index 0000000..9847a9b --- /dev/null +++ b/configs/mx6cuboxi_spl_defconfig @@ -0,0 +1,6 @@ +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,SPL,MX6Q" +CONFIG_ARM=y +CONFIG_TARGET_MX6CUBOXI=y +CONFIG_DM=y +CONFIG_DM_THERMAL=y diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h new file mode 100644 index 0000000..7ded5bc --- /dev/null +++ b/include/configs/mx6cuboxi.h @@ -0,0 +1,257 @@ +/*

• • Copyright (C) 2012 Freescale Semiconductor, Inc.
• • Configuration settings for the Freescale i.MX6Q SabreSD board.
• • SPDX-License-Identifier: GPL-2.0+
• */

+#ifndef __MX6CUBOXI_CONFIG_H +#define __MX6CUBOXI_CONFIG_H

+#include <linux/sizes.h> +#include <asm/arch/imx-regs.h> +#include <asm/imx-common/gpio.h> +#include "mx6_common.h"

+#define CONFIG_MX6

+#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG +#define CONFIG_IMX6_THERMAL +#define CONFIG_SYS_GENERIC_BOARD

+#define CONFIG_SYS_MALLOC_LEN (2 * SZ_1M) +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MXC_GPIO +#define CONFIG_MXC_UART

+#define CONFIG_CMD_FUSE +#if defined(CONFIG_CMD_FUSE) || defined(CONFIG_IMX6_THERMAL) +#define CONFIG_MXC_OCOTP +#endif

+/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR

+#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_EXT4 +#define CONFIG_CMD_EXT4_WRITE +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION

+/* Ethernet Configuration */ +#define CONFIG_FEC_MXC +#ifdef CONFIG_FEC_MXC +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_FEC_MXC_PHYADDR 0 +#define CONFIG_PHYLIB +#define CONFIG_PHY_ATHEROS +#endif

+/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200

+/* Command definition */ +#include <config_cmd_default.h>

+#define CONFIG_CMD_BOOTZ +#define CONFIG_CMD_SETEXPR +#undef CONFIG_CMD_IMLS

+#define CONFIG_BOOTDELAY 1

+#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000

+#ifdef CONFIG_SUPPORT_EMMC_BOOT +#define EMMC_ENV \

• "emmcdev=2\0" \
• "update_emmc_firmware=" \

• "if test ${ip_dyn} = yes; then " \
  

• 	"setenv get_cmd dhcp; " \
  

• "else " \
  

• 	"setenv get_cmd tftp; " \
  

• "fi; " \
  

• "if ${get_cmd} ${update_sd_firmware_filename}; then " \
  

• 	"if mmc dev ${emmcdev} 1; then "	\
  

• 		"setexpr fw_sz ${filesize} / 0x200; " \
  

• 		"setexpr fw_sz ${fw_sz} + 1; "	\
  

• 		"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
  

• 	"fi; "	\
  

• "fi\0"
  

+#else +#define EMMC_ENV "" +#endif

+#define CONFIG_EXTRA_ENV_SETTINGS \

• "script=boot.scr\0" \
• "image=zImage\0" \
• "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
• "fdt_addr=0x18000000\0" \
• "boot_fdt=try\0" \
• "ip_dyn=yes\0" \
• "console=" CONFIG_CONSOLE_DEV "\0" \
• "fdt_high=0xffffffff\0" \
• "initrd_high=0xffffffff\0" \
• "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
• "mmcpart=1\0" \
• "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
• "update_sd_firmware=" \

• "if test ${ip_dyn} = yes; then " \
  

• 	"setenv get_cmd dhcp; " \
  

• "else " \
  

• 	"setenv get_cmd tftp; " \
  

• "fi; " \
  

• "if mmc dev ${mmcdev}; then "	\
  

• 	"if ${get_cmd} ${update_sd_firmware_filename}; then " \
  

• 		"setexpr fw_sz ${filesize} / 0x200; " \
  

• 		"setexpr fw_sz ${fw_sz} + 1; "	\
  

• 		"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
  

• 	"fi; "	\
  

• "fi\0" \
  

• EMMC_ENV \
• "mmcargs=setenv bootargs console=${console},${baudrate} " \

• "root=${mmcroot}\0" \
  

• "loadbootscript=" \

• "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  

• "bootscript=echo Running bootscript from mmc ...; " \

• "source\0" \
  

• "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
• "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
• "mmcboot=echo Booting from mmc ...; " \

• "run mmcargs; " \
  

• "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  

• 	"if run loadfdt; then " \
  

• 		"bootz ${loadaddr} - ${fdt_addr}; " \
  

• 	"else " \
  

• 		"if test ${boot_fdt} = try; then " \
  

• 			"bootz; " \
  

• 		"else " \
  

• 			"echo WARN: Cannot load the DT; " \
  

• 		"fi; " \
  

• 	"fi; " \
  

• "else " \
  

• 	"bootz; " \
  

• "fi;\0" \
  

• "netargs=setenv bootargs console=${console},${baudrate} " \

• "root=/dev/nfs " \
  

• "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
  

• "netboot=echo Booting from net ...; " \

• "run netargs; " \
  

• "if test ${ip_dyn} = yes; then " \
  

• 	"setenv get_cmd dhcp; " \
  

• "else " \
  

• 	"setenv get_cmd tftp; " \
  

• "fi; " \
  

• "${get_cmd} ${image}; " \
  

• "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  

• 	"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
  

• 		"bootz ${loadaddr} - ${fdt_addr}; " \
  

• 	"else " \
  

• 		"if test ${boot_fdt} = try; then " \
  

• 			"bootz; " \
  

• 		"else " \
  

• 			"echo WARN: Cannot load the DT; " \
  

• 		"fi; " \
  

• 	"fi; " \
  

• "else " \
  

• 	"bootz; " \
  

• "fi;\0"
  

+#define CONFIG_BOOTCOMMAND \

• "mmc dev ${mmcdev};" \
• "if mmc rescan; then " \

• "if run loadbootscript; then " \
  

• "run bootscript; " \
  

• "else " \
  

• 	"if run loadimage; then " \
  

• 		"run mmcboot; " \
  

• 	"else run netboot; " \
  

• 	"fi; " \
  

• "fi; " \
  

• "else run netboot; fi"

+#define CONFIG_ARP_TIMEOUT 200UL

+/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE

+#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR

+#define CONFIG_CMDLINE_EDITING +#define CONFIG_STACKSIZE (128 * 1024)

+/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR

+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE

+#define CONFIG_SYS_INIT_SP_OFFSET \

• (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)

+#define CONFIG_SYS_INIT_SP_ADDR \

• (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

+/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH +#define CONFIG_ENV_SIZE (8 * 1024) +#define CONFIG_ENV_IS_IN_MMC

+#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (8 * 64 * 1024) +#endif

+#define CONFIG_OF_LIBFDT +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif

+#ifdef CONFIG_SPL +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_MMC_SUPPORT +#include "imx6_spl.h" +#endif

+#define CONFIG_MXC_UART_BASE UART1_BASE +#define CONFIG_CONSOLE_DEV "ttymxc0" +#define CONFIG_MMCROOT "/dev/mmcblk0p2" +#define CONFIG_DEFAULT_FDT_FILE "imx6q-hummingboard.dtb" +#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)

+#define CONFIG_SUPPORT_EMMC_BOOT

+#define CONFIG_SYS_FSL_USDHC_NUM 1 +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_SYS_MMC_ENV_DEV 0 /* SDHC2 */ +#endif

+#endif /* __MX6CUBOXI_CONFIG_H */

Patch looks nice for me.

Regards, Stefano