27 Aug
2011
27 Aug
'11
2:01 p.m.
On Aug 27, 2011, at 6:36 AM, Wolfgang Denk wrote:
Dear Kumar Gala,
In message 1314443032-2811-1-git-send-email-galak@kernel.crashing.org you wrote:
Issue: CoreNet bad data signal is not sent with shared data from L1 Data Cache when it has an error
Workaround: Run in write-shadow mode by setting L1CSR2[DCWS] = 1
By default we do NOT enable this, thus we have #undef in config_mpc85xx.h for this erratum.
NAK. Please do not undef what is not defined anyway.
Best regards,
Wolfgang Denk
Any suggestions on how to do this? - comment it out?
/* #define CONFIG_SYS_FSL_ERRATUM_CPU_E500MC_A011 */
- k