In message 200409251842.21281.v.sudhakar@gdatech.co.in you wrote:
In Uboot ,I saw that the offset for CFG_ATA_DATA is defined as follows.
You are wrong. There is no such definition in the whole U-Boot code.
Can anyone explain thsi whay we need to specify the offset as this..or we have to specify in different manner.
/* Offset for data I/O */ #define CFG_ATA_DATA_OFFSET (CFG_PCMCIA_MEM_SIZE+320) /* Offset for normal register accesses */ #define CFG_ATA_REG_OFFSET (2*CFG_PCMCIA_MEM_SIZE*320)
These definitions are obvuiously wrong and connot work. I don;t know where you got them from, but this is not part of the U-Boot code.
As for your question: try to figure out how address decoding for the IDE controller register works.
Best regards,
Wolfgang Denk