This patch adds SPL booting support (NOR flash) for the PPC4xx platforms.
This SPL booting (Falcon mode) will be used by the upcoming lcd4_lwmon5 board port (lwmon5 variant).
Signed-off-by: Stefan Roese sr@denx.de --- arch/powerpc/cpu/ppc4xx/Makefile | 4 ++ arch/powerpc/cpu/ppc4xx/start.S | 37 +++++++++++++++-- arch/powerpc/cpu/ppc4xx/u-boot-spl.lds | 74 ++++++++++++++++++++++++++++++++++ arch/powerpc/cpu/ppc4xx/u-boot.lds | 2 + 4 files changed, 113 insertions(+), 4 deletions(-) create mode 100644 arch/powerpc/cpu/ppc4xx/u-boot-spl.lds
diff --git a/arch/powerpc/cpu/ppc4xx/Makefile b/arch/powerpc/cpu/ppc4xx/Makefile index 8da2f86..e301dc6 100644 --- a/arch/powerpc/cpu/ppc4xx/Makefile +++ b/arch/powerpc/cpu/ppc4xx/Makefile @@ -68,6 +68,10 @@ COBJS += miiphy.o COBJS += uic.o endif
+ifdef CONFIG_SPL_BUILD +COBJS-y += spl_boot.o +endif + SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS) $(COBJS-y)) START := $(addprefix $(obj),$(START)) diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S index 7aef43b..ae990cc 100644 --- a/arch/powerpc/cpu/ppc4xx/start.S +++ b/arch/powerpc/cpu/ppc4xx/start.S @@ -232,7 +232,7 @@ * * Use r12 to access the GOT */ -#if !defined(CONFIG_NAND_SPL) +#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD) START_GOT GOT_ENTRY(_GOT2_TABLE_) GOT_ENTRY(_FIXUP_TABLE_) @@ -248,7 +248,8 @@ END_GOT #endif /* CONFIG_NAND_SPL */
-#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) +#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) && \ + !defined(CONFIG_SPL_BUILD) /* * NAND U-Boot image is started from offset 0 */ @@ -270,6 +271,18 @@ bl _start_440 #endif
+#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD) + /* + * This is the entry of the real U-Boot from a board port + * that supports SPL booting on the PPC4xx. We only need + * to call board_init_f() here. Everything else has already + * been done in the SPL u-boot version. + */ + GET_GOT /* initialize GOT access */ + bl board_init_f /* run 1st part of board init code (in Flash)*/ + /* NOTREACHED - board_init_f() does not return */ +#endif + /* * 440 Startup -- on reset only the top 4k of the effective * address space is mapped in by an entry in the instruction @@ -539,7 +552,7 @@ tlbnx2: addi r4,r4,1 /* Next TLB */ * r3 - 1st arg to board_init(): IMMP pointer * r4 - 2nd arg to board_init(): boot flag */ -#ifndef CONFIG_NAND_SPL +#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD) .text .long 0x27051956 /* U-Boot Magic Number */ .globl version_string @@ -612,6 +625,18 @@ _end_of_vectors: .globl _start _start:
+#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD) + /* + * This is the entry of the real U-Boot from a board port + * that supports SPL booting on the PPC4xx. We only need + * to call board_init_f() here. Everything else has already + * been done in the SPL u-boot version. + */ + GET_GOT /* initialize GOT access */ + bl board_init_f /* run 1st part of board init code (in Flash)*/ + /* NOTREACHED - board_init_f() does not return */ +#endif + /*****************************************************************************/ #if defined(CONFIG_440)
@@ -796,7 +821,9 @@ _start: #ifdef CONFIG_NAND_SPL bl nand_boot_common /* will not return */ #else +#ifndef CONFIG_SPL_BUILD GET_GOT +#endif
bl cpu_init_f /* run low-level CPU init code (from Flash) */ bl board_init_f @@ -1080,7 +1107,7 @@ _start: /*----------------------------------------------------------------------- */
-#ifndef CONFIG_NAND_SPL +#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD) /* * This code finishes saving the registers to the exception frame * and jumps to the appropriate handler for the exception. @@ -1262,6 +1289,7 @@ in32r: lwbrx r3,r0,r3 blr
+#if !defined(CONFIG_SPL_BUILD) /* * void relocate_code (addr_sp, gd, addr_moni) * @@ -1626,6 +1654,7 @@ __440_msr_continue:
mtlr r4 /* restore link register */ blr +#endif /* CONFIG_SPL_BUILD */
#if defined(CONFIG_440) /*----------------------------------------------------------------------------+ diff --git a/arch/powerpc/cpu/ppc4xx/u-boot-spl.lds b/arch/powerpc/cpu/ppc4xx/u-boot-spl.lds new file mode 100644 index 0000000..4634263 --- /dev/null +++ b/arch/powerpc/cpu/ppc4xx/u-boot-spl.lds @@ -0,0 +1,74 @@ +/* + * Copyright 2012-2013 Stefan Roese sr@denx.de + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +MEMORY +{ + sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, + LENGTH = CONFIG_SPL_BSS_MAX_SIZE + flash : ORIGIN = CONFIG_SPL_TEXT_BASE, + LENGTH = CONFIG_SYS_SPL_MAX_LEN +} + +OUTPUT_ARCH(powerpc) +ENTRY(_start) +SECTIONS +{ +#ifdef CONFIG_440 + .bootpg 0xfffff000 : + { + arch/powerpc/cpu/ppc4xx/start.o (.bootpg) + + /* + * PPC440 board need a board specific object with the + * TLB definitions. This needs to get included right after + * start.o, since the first shadow TLB only covers 4k + * of address space. + */ + CONFIG_BOARDDIR/init.o (.bootpg) + } > flash +#endif + + .resetvec 0xFFFFFFFC : + { + KEEP(*(.resetvec)) + } > flash + + .text : + { + __start = .; + arch/powerpc/cpu/ppc4xx/start.o (.text) + CONFIG_BOARDDIR/init.o (.text) + *(.text*) + } > flash + + . = ALIGN(4); + .data : { *(SORT_BY_ALIGNMENT(.data*)) } > flash + + . = ALIGN(4); + .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } > flash + + .bss : + { + . = ALIGN(4); + __bss_start = .; + *(.bss*) + . = ALIGN(4); + __bss_end__ = .; + } > sdram +} diff --git a/arch/powerpc/cpu/ppc4xx/u-boot.lds b/arch/powerpc/cpu/ppc4xx/u-boot.lds index a96ddd5..540f7ca 100644 --- a/arch/powerpc/cpu/ppc4xx/u-boot.lds +++ b/arch/powerpc/cpu/ppc4xx/u-boot.lds @@ -96,6 +96,7 @@ SECTIONS . = ALIGN(256); __init_end = .;
+#ifndef CONFIG_SPL #ifdef CONFIG_440 .bootpg RESET_VECTOR_ADDRESS - 0xffc : { @@ -132,6 +133,7 @@ SECTIONS #if (RESET_VECTOR_ADDRESS == 0xfffffffc) . |= 0x10; #endif +#endif /* CONFIG_SPL */
__bss_start = .; .bss (NOLOAD) :