This adds a general board file based on MT7622 SoCs from MediaTek. This commit is adding the basic boot support for the MT7622 rfb.
Signed-off-by: Sam Shih sam.shih@mediatek.com Reviewed-by: Ryder Lee ryder.lee@mediatek.com --- arch/arm/dts/Makefile | 1 + arch/arm/dts/mt7622-rfb.dts | 180 +++++++++++++++++++++++++++++ board/mediatek/mt7622/Kconfig | 17 +++ board/mediatek/mt7622/MAINTAINERS | 6 + board/mediatek/mt7622/Makefile | 4 + board/mediatek/mt7622/mt7622_rfb.c | 23 ++++ configs/mt7622_rfb_defconfig | 55 +++++++++ include/configs/mt7622.h | 46 ++++++++ 8 files changed, 332 insertions(+) create mode 100644 arch/arm/dts/mt7622-rfb.dts create mode 100644 board/mediatek/mt7622/Kconfig create mode 100644 board/mediatek/mt7622/MAINTAINERS create mode 100644 board/mediatek/mt7622/Makefile create mode 100644 board/mediatek/mt7622/mt7622_rfb.c create mode 100644 configs/mt7622_rfb_defconfig create mode 100644 include/configs/mt7622.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 3dc9c4d41c..b92980bd76 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -833,6 +833,7 @@ dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \ k3-j721e-r5-common-proc-board.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += \ + mt7622-rfb.dtb \ mt7623n-bananapi-bpi-r2.dtb \ mt7629-rfb.dtb \ mt8516-pumpkin.dtb \ diff --git a/arch/arm/dts/mt7622-rfb.dts b/arch/arm/dts/mt7622-rfb.dts new file mode 100644 index 0000000000..ec30f5c6eb --- /dev/null +++ b/arch/arm/dts/mt7622-rfb.dts @@ -0,0 +1,180 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2019 MediaTek Inc. + * Author: Sam Shih sam.shih@mediatek.com + */ + +/dts-v1/; +#include "mt7622.dtsi" +#include "mt7622-u-boot.dtsi" + +/ { + #address-cells = <1>; + #size-cells = <1>; + model = "mt7622-rfb"; + compatible = "mediatek,mt7622", "mediatek,mt7622-rfb"; + chosen { + stdout-path = &uart0; + tick-timer = &timer0; + }; + + aliases { + spi0 = &snfi; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0x40000000 0x10000000>; + }; + + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; +}; + + +&pinctrl { + snfi_pins: snfi-pins { + mux { + function = "flash"; + groups = "snfi"; + }; + }; + + snor_pins: snor-pins { + mux { + function = "flash"; + groups = "spi_nor"; + }; + }; + + uart0_pins: uart0 { + mux { + function = "uart"; + groups = "uart0_0_tx_rx" ; + }; + }; + + watchdog_pins: watchdog-default { + mux { + function = "watchdog"; + groups = "watchdog"; + }; + }; + + mmc0_pins_default: mmc0default { + mux { + function = "emmc"; + groups = "emmc"; + }; + + /* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7", + * "NRB","NCLE" pins are used as DAT0,DAT1,DAT2,DAT3,DAT4, + * DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively + */ + conf-cmd-dat { + pins = "NDL0", "NDL1", "NDL2", + "NDL3", "NDL4", "NDL5", + "NDL6", "NDL7", "NRB"; + input-enable; + bias-pull-up; + }; + + conf-clk { + pins = "NCLE"; + bias-pull-down; + }; + + }; + + mmc1_pins_default: mmc1default { + mux { + function = "sd"; + groups = "sd_0"; + }; + /* "I2S2_OUT, "I2S4_IN"", "I2S3_IN", "I2S2_IN", + * "I2S4_OUT", "I2S3_OUT" are used as DAT0, DAT1, + * DAT2, DAT3, CMD, CLK for SD respectively. + */ + conf-cmd-data { + pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN", + "I2S2_IN","I2S4_OUT"; + input-enable; + drive-strength = <8>; + bias-pull-up; + }; + conf-clk { + pins = "I2S3_OUT"; + drive-strength = <12>; + bias-pull-down; + }; + conf-cd { + pins = "TXD3"; + bias-pull-up; + }; + + }; +}; + +&snfi { + pinctrl-names = "default", "snfi"; + pinctrl-0 = <&snor_pins>; + pinctrl-1 = <&snfi_pins>; + status = "okay"; + + spi-flash@0{ + compatible = "jedec,spi-nor"; + reg = <0>; + u-boot,dm-pre-reloc; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_default>; + status = "okay"; + bus-width = <8>; + max-frequency = <50000000>; + cap-sd-highspeed; + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_3p3v>; + non-removable; +}; + +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins_default>; + status = "okay"; + bus-width = <4>; + max-frequency = <50000000>; + cap-sd-highspeed; + r_smpl = <1>; + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_3p3v>; +}; + +&watchdog { + pinctrl-names = "default"; + pinctrl-0 = <&watchdog_pins>; + status = "okay"; +}; diff --git a/board/mediatek/mt7622/Kconfig b/board/mediatek/mt7622/Kconfig new file mode 100644 index 0000000000..d0abdc0a67 --- /dev/null +++ b/board/mediatek/mt7622/Kconfig @@ -0,0 +1,17 @@ +if TARGET_MT7622 + +config SYS_BOARD + default "mt7622" + +config SYS_CONFIG_NAME + default "mt7622" + +config MTK_BROM_HEADER_INFO + string + default "lk=1" + +config MTK_BROM_HEADER_INFO + string + default "media=nor" + +endif diff --git a/board/mediatek/mt7622/MAINTAINERS b/board/mediatek/mt7622/MAINTAINERS new file mode 100644 index 0000000000..a3e0e75ca0 --- /dev/null +++ b/board/mediatek/mt7622/MAINTAINERS @@ -0,0 +1,6 @@ +MT7622 +M: Sam Shih sam.shih@mediatek.com +S: Maintained +F: board/mediatek/mt7622 +F: include/configs/mt7622.h +F: configs/mt7622_rfb_defconfig diff --git a/board/mediatek/mt7622/Makefile b/board/mediatek/mt7622/Makefile new file mode 100644 index 0000000000..2c54d86fff --- /dev/null +++ b/board/mediatek/mt7622/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0 + +obj-y += mt7622_rfb.o + diff --git a/board/mediatek/mt7622/mt7622_rfb.c b/board/mediatek/mt7622/mt7622_rfb.c new file mode 100644 index 0000000000..b9296bede2 --- /dev/null +++ b/board/mediatek/mt7622/mt7622_rfb.c @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2018 MediaTek Inc. + * Author: Sam Shih sam.shih@mediatek.com + */ + +#include <common.h> +#include <config.h> + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + return 0; +} + +int board_late_init(void) +{ + gd->env_valid = 1; //to load environment variable from persistent store + env_relocate(); + return 0; +} diff --git a/configs/mt7622_rfb_defconfig b/configs/mt7622_rfb_defconfig new file mode 100644 index 0000000000..e1917e70e7 --- /dev/null +++ b/configs/mt7622_rfb_defconfig @@ -0,0 +1,55 @@ +CONFIG_ARM=y +CONFIG_POSITION_INDEPENDENT=y +CONFIG_ARCH_MEDIATEK=y +CONFIG_TARGET_MT7622=y +CONFIG_SYS_TEXT_BASE=0x41e00000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_SMBIOS_PRODUCT_NAME="" +CONFIG_FIT=y +CONFIG_LOGLEVEL=7 +CONFIG_LOG=y +CONFIG_LOG_MAX_LEVEL=6 +CONFIG_DEFAULT_FDT_FILE="mt7622-rfb" +CONFIG_SYS_PROMPT="MT7622> " +CONFIG_CMD_BOOTMENU=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF_TEST=y +CONFIG_CMD_SMC=y +CONFIG_DEFAULT_DEVICE_TREE="mt7622-rfb" +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_REGMAP=y +CONFIG_SYSCON=y +CONFIG_CLK=y +CONFIG_DM_GPIO=y +CONFIG_DM_MMC=y +CONFIG_MMC_HS200_SUPPORT=y +CONFIG_MMC_MTK=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_ISSI=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_DM_ETH=y +CONFIG_PINCTRL=y +CONFIG_PINCONF=y +CONFIG_PINCTRL_MT7622=y +CONFIG_POWER_DOMAIN=y +CONFIG_MTK_POWER_DOMAIN=y +CONFIG_RAM=y +CONFIG_DM_RESET=y +CONFIG_DM_SERIAL=y +CONFIG_MTK_SERIAL=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_MTK_SNFI_SPI=y +CONFIG_SYSRESET_WATCHDOG=y +CONFIG_TIMER=y +CONFIG_MTK_TIMER=y +CONFIG_WDT_MTK=y +CONFIG_LZ4=y +CONFIG_LZO=y +CONFIG_HEXDUMP=y diff --git a/include/configs/mt7622.h b/include/configs/mt7622.h new file mode 100644 index 0000000000..dfd506ed24 --- /dev/null +++ b/include/configs/mt7622.h @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Configuration for MediaTek MT7629 SoC + * + * Copyright (C) 2019 MediaTek Inc. + * Author: Sam Shih sam.shih@mediatek.com + */ + +#ifndef __MT7622_H +#define __MT7622_H + +#include <linux/sizes.h> + +#define CONFIG_SYS_MAXARGS 8 +#define CONFIG_SYS_BOOTM_LEN SZ_64M +#define CONFIG_SYS_CBSIZE SZ_1K +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN SZ_4M +#define CONFIG_SYS_NONCACHED_MEMORY SZ_1M + +/* Allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +#define CONFIG_SYS_MMC_ENV_DEV 0 + +/* Uboot definition */ +#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE + +/* SPL -> Uboot */ +#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M - \ + GENERATED_GBL_DATA_SIZE) +/* UBoot -> Kernel */ +#define CONFIG_LOADADDR 0x4007ff28 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +/* DRAM */ +#define CONFIG_SYS_SDRAM_BASE 0x40000000 + +/* Ethernet */ +#define CONFIG_IPADDR 192.168.1.1 +#define CONFIG_SERVERIP 192.168.1.3 + +#endif