OMAP5 requires that parent domains scale ahead of dependent domains. This is due to the restrictions in timing closure. To ensure a consistent behavior accross all OMAP5 SoCs, ensure that vdd_core scale first, then vdd_mpu and finally vdd_iva.
Reported-by: Isabelle Gros i-gros@ti.com Reported-by: Jerome Angeloni j-angeloni@ti.com Signed-off-by: Nishanth Menon nm@ti.com --- arch/arm/cpu/armv7/omap5/clocks.c | 8 ++++---- 1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap5/clocks.c b/arch/arm/cpu/armv7/omap5/clocks.c index 07a7556..5e12231 100644 --- a/arch/arm/cpu/armv7/omap5/clocks.c +++ b/arch/arm/cpu/armv7/omap5/clocks.c @@ -245,14 +245,14 @@ void scale_vcores(void)
omap_vc_init(PRM_VC_I2C_CHANNEL_FREQ_KHZ);
- /* Enable 1.22V from TPS for vdd_mpu */ - volt = 1220; - do_scale_tps62361(-1, TPS62361_REG_ADDR_SET1, volt); - /* VCORE 1 - for vdd_core */ volt = 1000; do_scale_vcore(SMPS_REG_ADDR_VCORE1, volt);
+ /* Enable 1.22V from TPS for vdd_mpu */ + volt = 1220; + do_scale_tps62361(-1, TPS62361_REG_ADDR_SET1, volt); + /* VCORE 2 - for vdd_MM */ volt = 1125; do_scale_vcore(SMPS_REG_ADDR_VCORE2, volt);