Signed-off-by: John Rigby john.rigby@linaro.org --- arch/arm/include/asm/arch-omap3/mem.h | 45 +++++++++++++++++++++++++++++++++ 1 files changed, 45 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-omap3/mem.h b/arch/arm/include/asm/arch-omap3/mem.h index f165949..970e8b4 100644 --- a/arch/arm/include/asm/arch-omap3/mem.h +++ b/arch/arm/include/asm/arch-omap3/mem.h @@ -54,6 +54,29 @@ enum { #define SDP_SDRC_DLLAB_CTRL ((DLL_ENADLL << 3) | \ (DLL_LOCKDLL << 2) | (DLL_DLLPHASE_90 << 1))
+#define SDP_3430_SDRC_RFR_CTRL_165MHz 0x0004e201 /* 7.8us/6ns - 50=0x4e2 */ +#define SDP_3430_SDRC_RFR_CTRL_200MHz 0x0005e601 /* 7.8us/5ns - 50=0x5e6 */ + +/* set the 343x-SDRC incoming address convention */ +#if defined(SDRC_B_R_C) +#define B_ALL (0 << 6) /* bank-row-column */ +#elif defined(SDRC_B1_R_B0_C) +#define B_ALL (1 << 6) /* bank1-row-bank0-column */ +#elif defined(SDRC_R_B_C) +#define B_ALL (2 << 6) /* row-bank-column */ +#endif + + +#define SDP_SDRC_MDCFG_0_DDR (0x02584019|B_ALL) +#define SDP_SDRC_MDCFG_0_DDR_MICRON_XM (0x03588019|B_ALL) +#define SDP_SDRC_MDCFG_0_DDR_NUMONYX_XM (0x04590019|B_ALL) + +#define SDP_SDRC_MR_0_DDR 0x00000032 +/* Diabling power down mode using CKE pin */ +#define SDP_SDRC_POWER_POP 0x00000081 + + + /* Infineon part of 3430SDP (165MHz optimized) 6.06ns * ACTIMA * TDAL = Twr/Tck + Trp/tck = 15/6 + 18/6 = 2.5 + 3 = 5.5 -> 6 @@ -167,6 +190,28 @@ enum { (NUMONYX_XSR_165 << 0) | (NUMONYX_TXP_165 << 8) | \ (NUMONYX_TWTR_165 << 16))
+/* Micron part (200MHz optimized) 5 ns + */ +#define MICRON_TDAL_200 6 +#define MICRON_TDPL_200 3 +#define MICRON_TRRD_200 2 +#define MICRON_TRCD_200 3 +#define MICRON_TRP_200 3 +#define MICRON_TRAS_200 8 +#define MICRON_TRC_200 11 +#define MICRON_TRFC_200 15 +#define MICRON_V_ACTIMA_200 ((MICRON_TRFC_200 << 27) | (MICRON_TRC_200 << 22) | (MICRON_TRAS_200 << 18) \ + | (MICRON_TRP_200 << 15) | (MICRON_TRCD_200 << 12) |(MICRON_TRRD_200 << 9) | \ + (MICRON_TDPL_200 << 6) | (MICRON_TDAL_200)) + +#define MICRON_TWTR_200 2 +#define MICRON_TCKE_200 4 +#define MICRON_TXP_200 2 +#define MICRON_XSR_200 23 +#define MICRON_V_ACTIMB_200 ((MICRON_TCKE_200 << 12) | (MICRON_XSR_200 << 0)) | \ + (MICRON_TXP_200 << 8) | (MICRON_TWTR_200 << 16) + + #ifdef CONFIG_OMAP3_INFINEON_DDR #define V_ACTIMA_165 INFINEON_V_ACTIMA_165 #define V_ACTIMB_165 INFINEON_V_ACTIMB_165