Re: [U-Boot] [PATCH v1] fsl-ddr: Fix the chip-select interleaving issue

On Nov 11, 2009, at 5:26 PM, Dave Liu wrote:

commit 1542fbdeec0d1e2a6df13189df8dcb1ce8802be3 introduced one new bug to chip-select interleaving.

Single DDR controller also can do the chip-select interleaving if there is dual-rank or qual-rank DIMMs.

Signed-off-by: Dave Liu daveliu@freescale.com

The v1 also address the cs_per_ctrl == 1 case

cpu/mpc8xxx/ddr/options.c | 6 ++---- 1 files changed, 2 insertions(+), 4 deletions(-)

applied to 85xx

- k