Heiko,
On 2019/11/19 下午7:04, Heiko Stuebner wrote:
From: Heiko Stuebner heiko.stuebner@theobroma-systems.com
Rockchips dwmmc controllers can't do dma to non-ddr addresses, like for example the soc-internal sram but during boot parts of TrustedFirmware need to be placed there from the read FIT image.
So add handling for a u-boot,spl-fifo-mode to not put the mmc controllers into fifo mode for all time.
The regular fifo-mode property still takes precedent and only if not set do we check for the spl-specific property.
Suggested-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com Signed-off-by: Heiko Stuebner heiko.stuebner@theobroma-systems.com
Well, this is a alternative solution of using bounce buffer for MMC in SPL.
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
drivers/mmc/rockchip_dw_mmc.c | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c index b2a1201631..a0e1be8794 100644 --- a/drivers/mmc/rockchip_dw_mmc.c +++ b/drivers/mmc/rockchip_dw_mmc.c @@ -72,6 +72,11 @@ static int rockchip_dwmmc_ofdata_to_platdata(struct udevice *dev) return -EINVAL; priv->fifo_mode = dev_read_bool(dev, "fifo-mode");
+#ifdef CONFIG_SPL_BUILD
- if (!priv->fifo_mode)
priv->fifo_mode = dev_read_bool(dev, "u-boot,spl-fifo-mode");+#endif
- /*
- 'clock-freq-min-max' is deprecated
- (see https://github.com/torvalds/linux/commit/b023030f10573de738bbe8df63d43acab64...)