Re: [U-Boot] [PATCH v2 1/7] i.MX6: board: Add BTicino i.MX6DL Mamoj initial support

On Thu, Apr 26, 2018 at 1:16 PM, Stefano Babic sbabic@denx.de wrote:

On 26/04/2018 09:33, Jagan Teki wrote:

...

On Thu, Apr 26, 2018 at 12:47 PM, Stefano Babic sbabic@denx.de wrote:

...

Hi Jagan,

On 11/04/2018 14:36, Jagan Teki wrote:

...

Add initial support for i.MX6DL BTicino Mamoj board.

Mamoh board added:

• SPL
• SPL_DM
• SPL_OF_CONTROL
• DM for U-Boot proper
• OF_CONTROL for U-Boot proper
• eMMC
• FEC
• Boot from eMMC
• Boot from USB SDP

Signed-off-by: Simone CIANNI simone.cianni@bticino.it Signed-off-by: Raffaele RECALCATI raffaele.recalcati@bticino.it Signed-off-by: Jagan Teki jagan@amarulasolutions.com

---

arch/arm/dts/Makefile | 1 + arch/arm/dts/imx6dl-mamoj-u-boot.dtsi | 15 ++++ arch/arm/dts/imx6dl-mamoj.dts | 84 +++++++++++++++++++ arch/arm/mach-imx/mx6/Kconfig | 29 +++++++ board/bticino/mamoj/Kconfig | 12 +++ board/bticino/mamoj/MAINTAINERS | 10 +++ board/bticino/mamoj/Makefile | 8 ++ board/bticino/mamoj/README | 60 +++++++++++++ board/bticino/mamoj/mamoj.c | 27 ++++++ board/bticino/mamoj/spl.c | 154 ++++++++++++++++++++++++++++++++++ configs/imx6dl_mamoj_defconfig | 39 +++++++++ include/configs/imx6dl-mamoj.h | 88 +++++++++++++++++++ 12 files changed, 527 insertions(+) create mode 100644 arch/arm/dts/imx6dl-mamoj-u-boot.dtsi create mode 100644 arch/arm/dts/imx6dl-mamoj.dts create mode 100644 board/bticino/mamoj/Kconfig create mode 100644 board/bticino/mamoj/MAINTAINERS create mode 100644 board/bticino/mamoj/Makefile create mode 100644 board/bticino/mamoj/README create mode 100644 board/bticino/mamoj/mamoj.c create mode 100644 board/bticino/mamoj/spl.c create mode 100644 configs/imx6dl_mamoj_defconfig create mode 100644 include/configs/imx6dl-mamoj.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index f03e276486..2a75711246 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -398,6 +398,7 @@ dtb-$(CONFIG_MX6QDL) += \ imx6dl-icore.dtb \ imx6dl-icore-mipi.dtb \ imx6dl-icore-rqs.dtb \

• imx6dl-mamoj.dtb \
  imx6q-cm-fx6.dtb \
  imx6q-icore.dtb \
  imx6q-icore-mipi.dtb \
  

diff --git a/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi b/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi new file mode 100644 index 0000000000..d4c3c0bdf0 --- /dev/null +++ b/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi @@ -0,0 +1,15 @@ +/*

• • Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com
• • SPDX-License-Identifier: GPL-2.0+
• */

+#include "imx6qdl-u-boot.dtsi"

+&usdhc3 {

• u-boot,dm-spl;
  

+};

+&pinctrl_usdhc3 {

• u-boot,dm-spl;
  

+}; diff --git a/arch/arm/dts/imx6dl-mamoj.dts b/arch/arm/dts/imx6dl-mamoj.dts new file mode 100644 index 0000000000..068d518de3 --- /dev/null +++ b/arch/arm/dts/imx6dl-mamoj.dts @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/*

• • Copyright (C) 2018 BTicino
• • Copyright (C) 2018 Amarula Solutions B.V.
• */

+/dts-v1/;

+#include <dt-bindings/gpio/gpio.h> +#include "imx6dl.dtsi"

+/ {

• model = "BTicino i.MX6DL Mamoj board";
  

• compatible = "bticino,imx6dl-mamoj", "fsl,imx6dl";
  

+};

+&fec {

• pinctrl-names = "default";
  

• pinctrl-0 = <&pinctrl_enet>;
  

• phy-mode = "mii";
  

• status = "okay";
  

+};

+&uart3 {

• pinctrl-names = "default";
  

• pinctrl-0 = <&pinctrl_uart3>;
  

• status = "okay";
  

+};

+&usdhc3 {

• pinctrl-names = "default";
  

• pinctrl-0 = <&pinctrl_usdhc3>;
  

• bus-width = <8>;
  

• non-removable;
  

• keep-power-in-suspend;
  

• status = "okay";
  

+};

+&iomuxc {

• pinctrl_enet: enetgrp {
  

•         fsl,pins = <
  

•                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
  

•                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
  

•                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b1
  

•                 MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0     0x1b0b0
  

•                 MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1     0x1b0b0
  

•                 MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2      0x1b0b0
  

•                 MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3      0x1b0b0
  

•                 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN       0x1b0b0
  

•                 MX6QDL_PAD_GPIO_19__ENET_TX_ER          0x1b0b0
  

•                 MX6QDL_PAD_GPIO_18__ENET_RX_CLK         0x1b0b1
  

•                 MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0     0x1b0b0
  

•                 MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1     0x1b0b0
  

•                 MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2      0x1b0b0
  

•                 MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3      0x1b0b0
  

•                 MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN      0x1b0b0
  

•                 MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER       0x1b0b0
  

•                 MX6QDL_PAD_KEY_COL3__ENET_CRS           0x1b0b0
  

•                 MX6QDL_PAD_KEY_ROW1__ENET_COL           0x1b0b0
  

•         >;
  

• };
  

• pinctrl_uart3: uart3grp {
  

•         fsl,pins = <
  

•                 MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
  

•                 MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
  

•         >;
  

• };
  

• pinctrl_usdhc3: usdhc3grp {
  

•         fsl,pins = <
  

•                 MX6QDL_PAD_SD3_CMD__SD3_CMD     0x17059
  

•                 MX6QDL_PAD_SD3_CLK__SD3_CLK     0x10059
  

•                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0  0x17059
  

•                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1  0x17059
  

•                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2  0x17059
  

•                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3  0x17059
  

•                 MX6QDL_PAD_SD3_DAT4__SD3_DATA4  0x17059
  

•                 MX6QDL_PAD_SD3_DAT5__SD3_DATA5  0x17059
  

•                 MX6QDL_PAD_SD3_DAT6__SD3_DATA6  0x17059
  

•                 MX6QDL_PAD_SD3_DAT7__SD3_DATA7  0x17059
  

•         >;
  

• };
  

+}; diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index d4ce38db8d..c6acba7f85 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -225,6 +225,34 @@ config TARGET_MX6MEMCAL config TARGET_MX6QARM2 bool "mx6qarm2"

+config TARGET_MX6DL_MAMOJ

• bool "Support BTicino Mamoj"
  

• select MX6QDL
  

• select OF_CONTROL
  

• select PINCTRL
  

• select DM
  

• select DM_ETH
  

• select DM_GPIO
  

• select DM_MMC
  

• select DM_THERMAL
  

• select SPL
  

• select SUPPORT_SPL
  

• select SPL_DM if SPL
  

• select SPL_OF_LIBFDT if SPL
  

• select SPL_OF_CONTROL if SPL
  

• select SPL_PINCTRL if SPL
  

• select SPL_SEPARATE_BSS if SPL
  

• select SPL_GPIO_SUPPORT if SPL
  

• select SPL_LIBCOMMON_SUPPORT if SPL
  

• select SPL_LIBDISK_SUPPORT if SPL
  

• select SPL_LIBGENERIC_SUPPORT if SPL
  

• select SPL_MMC_SUPPORT if SPL
  

• select SPL_SERIAL_SUPPORT if SPL
  

• select SPL_USB_HOST_SUPPORT if SPL
  

• select SPL_USB_GADGET_SUPPORT if SPL
  

• select SPL_USB_SDP_SUPPORT if SPL
  

• select SPL_WATCHDOG_SUPPORT if SPL
  

config TARGET_MX6Q_ENGICAM bool "Support Engicam i.Core(RQS)" select BOARD_LATE_INIT @@ -458,6 +486,7 @@ source "board/bachmann/ot1200/Kconfig" source "board/barco/platinum/Kconfig" source "board/barco/titanium/Kconfig" source "board/boundary/nitrogen6x/Kconfig" +source "board/bticino/mamoj/Kconfig" source "board/ccv/xpress/Kconfig" source "board/compulab/cm_fx6/Kconfig" source "board/congatec/cgtqmx6eval/Kconfig" diff --git a/board/bticino/mamoj/Kconfig b/board/bticino/mamoj/Kconfig new file mode 100644 index 0000000000..e5aec589c8 --- /dev/null +++ b/board/bticino/mamoj/Kconfig @@ -0,0 +1,12 @@ +if TARGET_MX6DL_MAMOJ

+config SYS_BOARD

• default "mamoj"
  

+config SYS_VENDOR

• default "bticino"
  

+config SYS_CONFIG_NAME

• default "imx6dl-mamoj"
  

+endif diff --git a/board/bticino/mamoj/MAINTAINERS b/board/bticino/mamoj/MAINTAINERS new file mode 100644 index 0000000000..c35b387a82 --- /dev/null +++ b/board/bticino/mamoj/MAINTAINERS @@ -0,0 +1,10 @@ +MX6DL_MAMOJ BOARD +M: Jagan Teki jagan@amarulasolutions.com +M: Raffaele RECALCATI raffaele.recalcati@bticino.it +M: Simone CIANNI simone.cianni@bticino.it +S: Maintained +F: board/bticino/mamoj +F: include/configs/imx6dl-mamoj.h +F: configs/imx6dl_mamoj_defconfig +F: arch/arm/dts/imx6dl-mamoj.dts +F: arch/arm/dts/imx6dl-mamoj-u-boot.dtsi diff --git a/board/bticino/mamoj/Makefile b/board/bticino/mamoj/Makefile new file mode 100644 index 0000000000..f1ddda4891 --- /dev/null +++ b/board/bticino/mamoj/Makefile @@ -0,0 +1,8 @@ +# Copyright (C) 2018 BTicino +# Copyright (C) 2017 Amarula Solutions B.V. +# +# SPDX-License-Identifier: GPL-2.0+ +#

+obj-y := mamoj.o +obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/board/bticino/mamoj/README b/board/bticino/mamoj/README new file mode 100644 index 0000000000..eda9e45ed1 --- /dev/null +++ b/board/bticino/mamoj/README @@ -0,0 +1,60 @@ +BTicino Mamoj board: +===================

+Build:

• $ make mrproper
• $ make imx6dl_mamoj_defconfig
• $ make
• This will generate the SPL image called SPL and the u-boot-dtb.img.

+The following methods can be used for booting Mamoj boards:

+1. USB SDP boot

+1. USB SDP boot: +---------------

• • Build imx_usb_loader
• $ git clone git://github.com/boundarydevices/imx_usb_loader.git
• $ cd imx_usb_loader
• $ make
• • Build the BSP and copy SPL, u-boot-dtb.img in imx_usb_loader directory
• • Put the board in "Serial Download Mode"
• • Plug-in USB-to-Serial, Open minicom 1152008N1 and USB OTG cables to Host
• • Turn-on board
• • Identify VID/PID using lsusb
• Bus 001 Device 010: ID 15a2:0061 Freescale Semiconductor, Inc. i.MX 6Solo/6DualLite SystemOnChip in RecoveryMode
• • Update the conf files
• imx_usb.conf

•  0x15a2:0x0061, mx6_usb_rom.conf, 0x0525:0xb4a4, mx6_usb_sdp_spl.conf
  

• mx6_usb_rom.conf

•  mx6_usb
  

•  hid,1024,0x910000,0x10000000,512M,0x00900000,0x40000
  

•  SPL:jump header2
  

• mx6_usb_sdp_spl.conf

•  mx6_spl_sdp
  

•  hid,uboot_header,1024,0x910000,0x10000000,512M,0x00900000,0x40000
  

•  u-boot-dtb.img:jump header2
  

• • Launch the loader

• $ ./imx_usb
  

• We can see U-Boot boot from USB SDP on minicom

+-- +Jagan Teki jagan@amarulasolutions.com +03/12/18 diff --git a/board/bticino/mamoj/mamoj.c b/board/bticino/mamoj/mamoj.c new file mode 100644 index 0000000000..478f673491 --- /dev/null +++ b/board/bticino/mamoj/mamoj.c @@ -0,0 +1,27 @@ +/*

• • Copyright (C) 2018 Simone CIANNI simone.cianni@bticino.it
• • Copyright (C) 2018 Raffaele RECALCATI raffaele.recalcati@bticino.it
• • Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com
• • SPDX-License-Identifier: GPL-2.0+
• */

+#include <common.h> +#include <asm/arch/sys_proto.h>

+DECLARE_GLOBAL_DATA_PTR;

+int board_init(void) +{

• /* Address of boot parameters */
  

• gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
  

• return 0;
  

+}

+int dram_init(void) +{

• gd->ram_size = imx_ddr_size();
  

• return 0;
  

+} diff --git a/board/bticino/mamoj/spl.c b/board/bticino/mamoj/spl.c new file mode 100644 index 0000000000..82568f7af5 --- /dev/null +++ b/board/bticino/mamoj/spl.c @@ -0,0 +1,154 @@ +/*

• • Copyright (C) 2018 Simone CIANNI simone.cianni@bticino.it
• • Copyright (C) 2018 Raffaele RECALCATI raffaele.recalcati@bticino.it
• • Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com
• • SPDX-License-Identifier: GPL-2.0+
• */

+#include <common.h> +#include <spl.h>

+#include <asm/io.h> +#include <linux/sizes.h>

+#include <asm/arch/clock.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/mx6-pins.h> +#include <asm/arch/sys_proto.h>

+DECLARE_GLOBAL_DATA_PTR;

+#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \

•                 PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
  

+static iomux_v3_cfg_t const uart3_pads[] = {

• IOMUX_PADS(PAD_EIM_D24__UART3_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
  

• IOMUX_PADS(PAD_EIM_D25__UART3_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
  

+};

+static int mx6dl_dcd_table[] = {

• 0x020e0774, 0x000C0000, /* MX6_IOM_GRP_DDR_TYPE */
  

• 0x020e0754, 0x00000000, /* MX6_IOM_GRP_DDRPKE */
  

• 0x020e04ac, 0x00000028, /* MX6_IOM_DRAM_SDCLK_0 */
  

• 0x020e04b0, 0x00000028, /* MX6_IOM_DRAM_SDCLK_1 */
  

• 0x020e0464, 0x00000028, /* MX6_IOM_DRAM_CAS */
  

• 0x020e0490, 0x00000028, /* MX6_IOM_DRAM_RAS */
  

• 0x020e074c, 0x00000028, /* MX6_IOM_GRP_ADDDS */
  

• 0x020e0494, 0x00000028, /* MX6_IOM_DRAM_RESET */
  

• 0x020e04a0, 0x00000000, /* MX6_IOM_DRAM_SDBA2 */
  

• 0x020e04b4, 0x00000028, /* MX6_IOM_DRAM_SDODT0 */
  

• 0x020e04b8, 0x00000028, /* MX6_IOM_DRAM_SDODT1 */
  

• 0x020e076c, 0x00000028, /* MX6_IOM_GRP_CTLDS */
  

• 0x020e0750, 0x00020000, /* MX6_IOM_GRP_DDRMODE_CTL */
  

• 0x020e04bc, 0x00000028, /* MX6_IOM_DRAM_SDQS0 */
  

• 0x020e04c0, 0x00000028, /* MX6_IOM_DRAM_SDQS1 */
  

• 0x020e04c4, 0x00000028, /* MX6_IOM_DRAM_SDQS2 */
  

• 0x020e04c8, 0x00000028, /* MX6_IOM_DRAM_SDQS3 */
  

• 0x020e0760, 0x00020000, /* MX6_IOM_GRP_DDRMODE */
  

• 0x020e0764, 0x00000028, /* MX6_IOM_GRP_B0DS */
  

• 0x020e0770, 0x00000028, /* MX6_IOM_GRP_B1DS */
  

• 0x020e0778, 0x00000028, /* MX6_IOM_GRP_B2DS */
  

• 0x020e077c, 0x00000028, /* MX6_IOM_GRP_B3DS */
  

• 0x020e0470, 0x00000028, /* MX6_IOM_DRAM_DQM0 */
  

• 0x020e0474, 0x00000028, /* MX6_IOM_DRAM_DQM1 */
  

• 0x020e0478, 0x00000028, /* MX6_IOM_DRAM_DQM2 */
  

• 0x020e047c, 0x00000028, /* MX6_IOM_DRAM_DQM3 */
  

• 0x021b001c, 0x00008000, /* MMDC0_MDSCR */
  

• 0x021b0800, 0xA1390003, /* DDR_PHY_P0_MPZQHWCTRL */
  

• 0x021b080c, 0x0042004b, /* MMDC1_MPWLDECTRL0 */
  

• 0x021b0810, 0x0038003c, /* MMDC1_MPWLDECTRL1 */
  

• 0x021b083c, 0x42340230, /* MPDGCTRL0 PHY0 */
  

• 0x021b0840, 0x0228022c, /* MPDGCTRL1 PHY0 */
  

• 0x021b0848, 0x42444646, /* MPRDDLCTL PHY0 */
  

• 0x021b0850, 0x38382e2e, /* MPWRDLCTL PHY0 */
  

• 0x021b081c, 0x33333333, /* DDR_PHY_P0_MPREDQBY0DL3 */
  

• 0x021b0820, 0x33333333, /* DDR_PHY_P0_MPREDQBY1DL3 */
  

• 0x021b0824, 0x33333333, /* DDR_PHY_P0_MPREDQBY2DL3 */
  

• 0x021b0828, 0x33333333, /* DDR_PHY_P0_MPREDQBY3DL3 */
  

• 0x021b08b8, 0x00000800, /* DDR_PHY_P0_MPMUR0 */
  

• 0x021b0004, 0x0002002D, /* MMDC0_MDPDC */
  

• 0x021b0008, 0x00333040, /* MMDC0_MDOTC */
  

• 0x021b000c, 0x3F4352F3, /* MMDC0_MDCFG0 */
  

• 0x021b0010, 0xB66D8B63, /* MMDC0_MDCFG1 */
  

• 0x021b0014, 0x01FF00DB, /* MMDC0_MDCFG2 */
  

• 0x021b0018, 0x00011740, /* MMDC0_MDMISC */
  

• 0x021b001c, 0x00008000, /* MMDC0_MDSCR */
  

• 0x021b002c, 0x000026D2, /* MMDC0_MDRWD */
  

• 0x021b0030, 0x00431023, /* MMDC0_MDOR */
  

• 0x021b0040, 0x00000017, /* Chan0 CS0_END */
  

• 0x021b0000, 0x83190000, /* MMDC0_MDCTL */
  

• 0x021b001c, 0x02008032, /* MMDC0_MDSCR  MR2 write, CS0 */
  

• 0x021b001c, 0x00008033, /* MMDC0_MDSCR, MR3 write, CS0 */
  

• 0x021b001c, 0x00048031, /* MMDC0_MDSCR, MR1 write, CS0 */
  

• 0x021b001c, 0x15208030, /* MMDC0_MDSCR, MR0write, CS0 */
  

• 0x021b001c, 0x04008040, /* MMDC0_MDSCR */
  

• 0x021b0020, 0x00007800, /* MMDC0_MDREF */
  

• 0x021b0818, 0x00022227, /* DDR_PHY_P0_MPODTCTRL */
  

• 0x021b0004, 0x0002556D, /* MMDC0_MDPDC */
  

• 0x021b0404, 0x00011006, /* MMDC0_MAPSR ADOPT */
  

• 0x021b001c, 0x00000000, /* MMDC0_MDSCR */
  

+};

Sorry to have not raised this before. I saw this the first time, but I did not understand. I tried to find a reason for it, but still I had no answer.

This is a DL, and DDR support is full integrated in U-Boot, including dynamic calibration if desired. What is the reason to dump the DCD table into code and push it with ddr_init, instead of setting structures for chip, gpr and calibration as most of boards are doing ? If you dump the table, you could this in the .cfg file where the DCD table belongs to, of course adding entries for DDR initialisation. I do not see after long thoughts any reason to go in this way.

Like initializing ddr config and calibration using mx6sdl_dram_iocfg and mx6_dram_cfg? yes I usually does the same instead of hot codding hex values.

Yes, this is what I mean.

...

It's my bad will update accoodingly and send.

Thanks - the rest of patchset is straightforward, and I will apply then the next version.

OK, and also this the dt changes on this have dependecy with these patches[1]. please make sure to apply these first.

[1] https://patchwork.ozlabs.org/cover/897156/

Jagan.