Layerscape supports GPIO registers to conrol GPIO singals. Add support of GPIO structure to enable GPIO access.
Signed-off-by: Pratiyush Srivastava pratiyush.srivastava@nxp.com Signed-off-by: Prabhakar Kushwaha prabhakar.kushwaha@nxp.com --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 4 ++++ arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 9 +++++++++ 2 files changed, 13 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index f8057ba..6af39d9 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -2,6 +2,7 @@ config ARCH_LS1012A bool "Freescale Layerscape LS1012A SoC" select SYS_FSL_MMDC select SYS_FSL_ERRATUM_A010315 + select SYS_GPIO1_ADDR
config ARCH_LS1043A bool "Freescale Layerscape LS1043A SoC" @@ -15,3 +16,6 @@ config SYS_FSL_MMDC
config SYS_FSL_ERRATUM_A010315 bool "Workaround for PCIe erratum A010315" + +config SYS_GPIO1_ADDR + bool "Support for GPIO structure to enable GPIO access" diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index df51871..d9d7cb6 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -584,6 +584,15 @@ struct ccsr_cci400 { u8 res_e004[0x10000 - 0xe004]; };
+typedef struct ccsr_gpio { + u32 gpdir; + u32 gpodr; + u32 gpdat; + u32 gpier; + u32 gpimr; + u32 gpicr; +} ccsr_gpio_t; + /* MMU 500 */ #define SMMU_SCR0 (SMMU_BASE + 0x0) #define SMMU_SCR1 (SMMU_BASE + 0x4)